1 /* $NetBSD: ixp425_pci.c,v 1.15 2022/09/27 06:36:43 skrll Exp $ */
2
3 /*
4 * Copyright (c) 2003
5 * Ichiro FUKUHARA <ichiro@ichiro.org>.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: ixp425_pci.c,v 1.15 2022/09/27 06:36:43 skrll Exp $");
32
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/device.h>
36
37 #include <uvm/uvm_extern.h>
38
39 #include <sys/bus.h>
40
41 #include <arm/xscale/ixp425reg.h>
42 #include <arm/xscale/ixp425var.h>
43
44 #include <evbarm/ixdp425/ixdp425reg.h>
45
46 #include <dev/pci/pcireg.h>
47 #include <dev/pci/pcivar.h>
48 #include <dev/pci/pciconf.h>
49
50 #include "opt_pci.h"
51 #include "pci.h"
52
53 void ixp425_pci_attach_hook(device_t, device_t,
54 struct pcibus_attach_args *);
55 int ixp425_pci_bus_maxdevs(void *, int);
56 void ixp425_pci_decompose_tag(void *, pcitag_t, int *, int *, int *);
57 void ixp425_pci_conf_setup(void *, struct ixp425_softc *, pcitag_t, int);
58 void ixp425_pci_conf_write(void *, pcitag_t, int, pcireg_t);
59 void ixp425_pci_conf_interrupt(void *, int, int, int, int, int *);
60 pcitag_t ixp425_pci_make_tag(void *, int, int, int);
61 pcireg_t ixp425_pci_conf_read(void *, pcitag_t, int);
62
63 #define MAX_PCI_DEVICES 32
64
65 void
ixp425_pci_init(struct ixp425_softc * sc)66 ixp425_pci_init(struct ixp425_softc *sc)
67 {
68 pci_chipset_tag_t pc = &sc->ia_pci_chipset;
69 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE)
70 struct pciconf_resources *pcires;
71 #endif
72 /*
73 * Initialise the PCI chipset tag
74 */
75 pc->pc_conf_v = sc;
76 pc->pc_attach_hook = ixp425_pci_attach_hook;
77 pc->pc_bus_maxdevs = ixp425_pci_bus_maxdevs;
78 pc->pc_make_tag = ixp425_pci_make_tag;
79 pc->pc_decompose_tag = ixp425_pci_decompose_tag;
80 pc->pc_conf_read = ixp425_pci_conf_read;
81 pc->pc_conf_write = ixp425_pci_conf_write;
82 pc->pc_conf_interrupt = ixp425_pci_conf_interrupt;
83
84 /*
85 * Initialize the bus space tags.
86 */
87 ixp425_io_bs_init(&sc->sc_pci_iot, sc);
88 ixp425_mem_bs_init(&sc->sc_pci_memt, sc);
89
90 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE)
91 pcires = pciconf_resource_init();
92
93 pciconf_resource_add(pcires, PCICONF_RESOURCE_IO,
94 0, IXP425_PCI_IO_SIZE);
95
96 /* PCI MEM space is mapped same address as real memory */
97 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM,
98 IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE);
99
100 aprint_normal_dev(sc->sc_dev, "configuring PCI bus\n");
101 pci_configure_bus(pc, pcires, 0 /* XXX bus = 0 */,
102 arm_dcache_align);
103
104 pciconf_resource_fini(pcires);
105 #endif
106 }
107
108 void
ixp425_pci_conf_interrupt(void * v,int a,int b,int c,int d,int * p)109 ixp425_pci_conf_interrupt(void *v, int a, int b, int c, int d, int *p)
110 {
111 }
112
113 void
ixp425_pci_attach_hook(device_t parent,device_t self,struct pcibus_attach_args * pba)114 ixp425_pci_attach_hook(device_t parent, device_t self,
115 struct pcibus_attach_args *pba)
116 {
117 /* Nothing to do. */
118 }
119
120 int
ixp425_pci_bus_maxdevs(void * v,int busno)121 ixp425_pci_bus_maxdevs(void *v, int busno)
122 {
123 return(MAX_PCI_DEVICES);
124 }
125
126 pcitag_t
ixp425_pci_make_tag(void * v,int bus,int device,int function)127 ixp425_pci_make_tag(void *v, int bus, int device, int function)
128 {
129 #ifdef PCI_DEBUG
130 printf("ixp425_pci_make_tag(v=%p, bus=%d, device=%d, function=%d)\n",
131 v, bus, device, function);
132 #endif
133 return ((bus << 16) | (device << 11) | (function << 8));
134 }
135
136 void
ixp425_pci_decompose_tag(void * v,pcitag_t tag,int * busp,int * devicep,int * functionp)137 ixp425_pci_decompose_tag(void *v, pcitag_t tag, int *busp, int *devicep,
138 int *functionp)
139 {
140 #ifdef PCI_DEBUG
141 printf("ixp425_pci_decompose_tag(v=%p, tag=0x%08lx, bp=%x, dp=%x, fp=%x)\n",
142 v, tag, (int)busp, (int)devicep, (int)functionp);
143 #endif
144 if (busp != NULL)
145 *busp = (tag >> 16) & 0xff;
146 if (devicep != NULL)
147 *devicep = (tag >> 11) & 0x1f;
148 if (functionp != NULL)
149 *functionp = (tag >> 8) & 0x7;
150 }
151
152 void
ixp425_pci_conf_setup(void * v,struct ixp425_softc * sc,pcitag_t tag,int offset)153 ixp425_pci_conf_setup(void *v, struct ixp425_softc *sc, pcitag_t tag, int offset)
154 {
155 int bus, device, function;
156
157 ixp425_pci_decompose_tag(v, tag, &bus, &device, &function);
158
159 if (bus == 0) {
160 if (device == 0 && function == 0) {
161 PCI_CSR_WRITE_4(sc, PCI_NP_AD, (offset & ~3));
162 } else {
163 /* configuration type 0 */
164 PCI_CSR_WRITE_4(sc, PCI_NP_AD, (1U << (32 - device)) |
165 (function << 8) | (offset & ~3));
166 }
167 } else {
168 /* configuration type 1 */
169 PCI_CSR_WRITE_4(sc, PCI_NP_AD,
170 (bus << 16) | (device << 11) |
171 (function << 8) | (offset & ~3) | 1);
172 }
173 }
174
175 /* read/write PCI Non-Pre-fetch Data */
176
177 pcireg_t
ixp425_pci_conf_read(void * v,pcitag_t tag,int offset)178 ixp425_pci_conf_read(void *v, pcitag_t tag, int offset)
179 {
180 struct ixp425_softc *sc = v;
181 uint32_t data;
182 pcireg_t rv;
183 int s;
184 #define PCI_NP_HAVE_BUG
185 #ifdef PCI_NP_HAVE_BUG
186 int i;
187 #endif
188
189 if ((unsigned int)offset >= PCI_CONF_SIZE)
190 return (pcireg_t) -1;
191
192 PCI_CONF_LOCK(s);
193 ixp425_pci_conf_setup(v, sc, tag, offset);
194
195 #ifdef PCI_DEBUG
196 printf("ixp425_pci_conf_read: tag=%lx,offset=%x\n",
197 tag, offset);
198 #endif
199
200 #ifdef PCI_NP_HAVE_BUG
201 /* PCI NP Bug workaround */
202 for (i = 0; i < 8; i++) {
203 PCI_CSR_WRITE_4(sc, PCI_NP_CBE, COMMAND_NP_CONF_READ);
204 rv = PCI_CSR_READ_4(sc, PCI_NP_RDATA);
205 rv = PCI_CSR_READ_4(sc, PCI_NP_RDATA);
206 }
207 #else
208 PCI_CSR_WRITE_4(sc, PCI_NP_CBE, COMMAND_NP_CONF_READ);
209 rv = PCI_CSR_READ_4(sc, PCI_NP_RDATA);
210 #endif
211
212 /* check&clear PCI abort */
213 data = PCI_CSR_READ_4(sc, PCI_ISR);
214 if (data & ISR_PFE) {
215 PCI_CSR_WRITE_4(sc, PCI_ISR, ISR_PFE);
216 PCI_CONF_UNLOCK(s);
217 return -1;
218 } else {
219 PCI_CONF_UNLOCK(s);
220 return rv;
221 }
222 }
223
224 void
ixp425_pci_conf_write(void * v,pcitag_t tag,int offset,pcireg_t val)225 ixp425_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)
226 {
227 struct ixp425_softc *sc = v;
228 uint32_t data;
229 int s;
230
231 if ((unsigned int)offset >= PCI_CONF_SIZE)
232 return;
233
234 PCI_CONF_LOCK(s);
235
236 ixp425_pci_conf_setup(v, sc, tag, offset);
237 #ifdef PCI_DEBUG
238 printf("ixp425_pci_conf_write: tag=%lx offset=%x <- val=%x\n",
239 tag, offset, val);
240 #endif
241 PCI_CSR_WRITE_4(sc, PCI_NP_CBE, COMMAND_NP_CONF_WRITE);
242 PCI_CSR_WRITE_4(sc, PCI_NP_WDATA, val);
243
244 /* check&clear PCI abort */
245 data = PCI_CSR_READ_4(sc, PCI_ISR);
246 if (data & ISR_PFE)
247 PCI_CSR_WRITE_4(sc, PCI_ISR, ISR_PFE);
248
249 PCI_CONF_UNLOCK(s);
250 }
251
252 /* read/write pci configuration data */
253
254 uint32_t
ixp425_pci_conf_reg_read(struct ixp425_softc * sc,uint32_t reg)255 ixp425_pci_conf_reg_read(struct ixp425_softc *sc, uint32_t reg)
256 {
257 uint32_t data;
258
259 bus_space_write_4(sc->sc_iot, sc->sc_pci_ioh,
260 PCI_CRP_AD_CBE, ((reg & ~3) | COMMAND_CRP_READ));
261 data = bus_space_read_4(sc->sc_iot, sc->sc_pci_ioh,
262 PCI_CRP_AD_RDATA);
263
264 return data;
265 }
266
267 void
ixp425_pci_conf_reg_write(struct ixp425_softc * sc,uint32_t reg,uint32_t data)268 ixp425_pci_conf_reg_write(struct ixp425_softc *sc, uint32_t reg,
269 uint32_t data)
270 {
271 bus_space_write_4(sc->sc_iot, sc->sc_pci_ioh,
272 PCI_CRP_AD_CBE, ((reg & ~3) | COMMAND_CRP_WRITE));
273 bus_space_write_4(sc->sc_iot, sc->sc_pci_ioh,
274 PCI_CRP_AD_WDATA, data);
275 }
276