1 /* $NetBSD: vexpress_platform.c,v 1.23 2023/04/07 08:55:31 skrll Exp $ */
2
3 /*-
4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include "opt_multiprocessor.h"
30 #include "opt_console.h"
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: vexpress_platform.c,v 1.23 2023/04/07 08:55:31 skrll Exp $");
34
35 #include <sys/param.h>
36 #include <sys/bus.h>
37 #include <sys/cpu.h>
38 #include <sys/device.h>
39 #include <sys/termios.h>
40
41 #include <dev/fdt/fdtvar.h>
42
43 #include <uvm/uvm_extern.h>
44
45 #include <machine/bootconfig.h>
46 #include <arm/cpufunc.h>
47
48 #include <arm/fdt/arm_fdtvar.h>
49
50 #include <arm/cortex/gtmr_var.h>
51
52 #include <arm/cortex/gic_reg.h>
53
54 #include <evbarm/dev/plcomreg.h>
55 #include <evbarm/fdt/machdep.h>
56
57 #include <arm/vexpress/vexpress_platform.h>
58
59 #include <libfdt.h>
60
61 #define VEXPRESS_REF_FREQ 24000000
62
63 extern struct bus_space armv7_generic_bs_tag;
64 extern struct arm32_bus_dma_tag arm_generic_dma_tag;
65
66 #define SYSREG_BASE 0x1c010000
67 #define SYSREG_SIZE 0x1000
68
69 #define SYS_FLAGS 0x0030
70 #define SYS_FLAGSCLR 0x0034
71 #define SYS_CFGDATA 0x00a0
72 #define SYS_CFGCTRL 0x00a4
73 #define SYS_CFGCTRL_START __BIT(31)
74 #define SYS_CFGCTRL_WRITE __BIT(30)
75 #define SYS_CFGCTRL_DCC __BITS(29,26)
76 #define SYS_CFGCTRL_FUNCTION __BITS(25,20)
77 #define SYS_CFGCTRL_FUNCTION_SHUTDOWN 8
78 #define SYS_CFGCTRL_FUNCTION_REBOOT 9
79 #define SYS_CFGCTRL_SITE __BITS(17,16)
80 #define SYS_CFGCTRL_POSITION __BITS(15,12)
81 #define SYS_CFGCTRL_DEVICE __BITS(11,0)
82 #define SYS_CFGSTAT 0x00a8
83 #define SYS_CFGSTAT_ERROR __BIT(1)
84 #define SYS_CFGSTAT_COMPLETE __BIT(0)
85
86 static bus_space_tag_t sysreg_bst = &armv7_generic_bs_tag;
87 static bus_space_handle_t sysreg_bsh;
88
89 #define SYSREG_WRITE(o, v) \
90 bus_space_write_4(sysreg_bst, sysreg_bsh, (o), (v))
91
92 void vexpress_platform_early_putchar(char);
93
94 void __noasan
vexpress_platform_early_putchar(char c)95 vexpress_platform_early_putchar(char c)
96 {
97 #ifdef CONSADDR
98 #define CONSADDR_VA ((CONSADDR - VEXPRESS_CORE_PBASE) + VEXPRESS_CORE_VBASE)
99 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
100 (volatile uint32_t *)CONSADDR_VA :
101 (volatile uint32_t *)CONSADDR;
102
103 while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFF) != 0)
104 continue;
105
106 uartaddr[PL01XCOM_DR / 4] = htole32(c);
107 dsb(sy);
108
109 while ((le32toh(uartaddr[PL01XCOM_FR / 4]) & PL01X_FR_TXFE) == 0)
110 continue;
111 #endif
112 }
113
114
115 static int
vexpress_a15_smp_init(void)116 vexpress_a15_smp_init(void)
117 {
118 int ret = 0;
119 #ifdef MULTIPROCESSOR
120 bus_space_tag_t gicd_bst = &armv7_generic_bs_tag;
121 bus_space_handle_t gicd_bsh;
122
123 /* Write init vec to SYS_FLAGS register */
124 SYSREG_WRITE(SYS_FLAGSCLR, 0xffffffff);
125 SYSREG_WRITE(SYS_FLAGS, KERN_VTOPHYS((vaddr_t)cpu_mpstart));
126
127 /* Map GIC distributor */
128 bus_space_map(gicd_bst, VEXPRESS_GIC_PBASE + GICD_BASE,
129 0x1000, 0, &gicd_bsh);
130
131 /* Enable GIC distributor */
132 bus_space_write_4(gicd_bst, gicd_bsh,
133 GICD_CTRL, GICD_CTRL_Enable);
134
135 /* Send sw interrupt to APs */
136 const uint32_t sgir = GICD_SGIR_TargetListFilter_NotMe;
137 bus_space_write_4(gicd_bst, gicd_bsh, GICD_SGIR, sgir);
138
139 /* Bitmask of CPUs (non-BSP) to start */
140 for (u_int cpuindex = 1; cpuindex < arm_cpu_max; cpuindex++) {
141 u_int i;
142 for (i = 0x10000000; i > 0; i--) {
143 if (cpu_hatched_p(cpuindex))
144 break;
145 }
146
147 if (i == 0) {
148 ret++;
149 aprint_error("cpu%d: WARNING: AP failed to start\n",
150 cpuindex);
151 }
152 }
153
154 /* Disable GIC distributor */
155 bus_space_write_4(gicd_bst, gicd_bsh, GICD_CTRL, 0);
156 #endif
157 return ret;
158 }
159
160
161 static const struct pmap_devmap *
vexpress_platform_devmap(void)162 vexpress_platform_devmap(void)
163 {
164 static const struct pmap_devmap devmap[] = {
165 DEVMAP_ENTRY(VEXPRESS_CORE_VBASE,
166 VEXPRESS_CORE_PBASE,
167 VEXPRESS_CORE_SIZE),
168 DEVMAP_ENTRY(VEXPRESS_GIC_VBASE,
169 VEXPRESS_GIC_PBASE,
170 VEXPRESS_GIC_SIZE),
171 DEVMAP_ENTRY_END
172 };
173
174 return devmap;
175 }
176
177 static void
vexpress_platform_bootstrap(void)178 vexpress_platform_bootstrap(void)
179 {
180 bus_space_map(sysreg_bst, SYSREG_BASE, SYSREG_SIZE, 0,
181 &sysreg_bsh);
182
183 #ifdef MULTIPROCESSOR
184 arm_cpu_max = 1 + __SHIFTOUT(armreg_l2ctrl_read(), L2CTRL_NUMCPU);
185 #endif
186 }
187
188 static void
vexpress_platform_init_attach_args(struct fdt_attach_args * faa)189 vexpress_platform_init_attach_args(struct fdt_attach_args *faa)
190 {
191 faa->faa_bst = &armv7_generic_bs_tag;
192 faa->faa_dmat = &arm_generic_dma_tag;
193 }
194
195 static void
vexpress_platform_device_register(device_t self,void * aux)196 vexpress_platform_device_register(device_t self, void *aux)
197 {
198 }
199
200 static void
vexpress_platform_reset(void)201 vexpress_platform_reset(void)
202 {
203 SYSREG_WRITE(SYS_CFGSTAT, 0);
204 SYSREG_WRITE(SYS_CFGDATA, 0);
205 SYSREG_WRITE(SYS_CFGCTRL,
206 SYS_CFGCTRL_START |
207 SYS_CFGCTRL_WRITE |
208 __SHIFTIN(SYS_CFGCTRL_FUNCTION_REBOOT,
209 SYS_CFGCTRL_FUNCTION));
210 }
211
212 static u_int
vexpress_platform_uart_freq(void)213 vexpress_platform_uart_freq(void)
214 {
215 return VEXPRESS_REF_FREQ;
216 }
217
218 static const struct fdt_platform vexpress_platform = {
219 .fp_devmap = vexpress_platform_devmap,
220 .fp_bootstrap = vexpress_platform_bootstrap,
221 .fp_mpstart = vexpress_a15_smp_init,
222 .fp_init_attach_args = vexpress_platform_init_attach_args,
223 .fp_device_register = vexpress_platform_device_register,
224 .fp_reset = vexpress_platform_reset,
225 .fp_delay = gtmr_delay,
226 .fp_uart_freq = vexpress_platform_uart_freq,
227 };
228
229 FDT_PLATFORM(vexpress, "arm,vexpress", &vexpress_platform);
230