1 /* $NetBSD: exynos_uart.c,v 1.7 2022/10/26 23:38:07 riastradh Exp $ */
2
3 /*-
4 * Copyright (c) 2013-2021 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry and Jared McNeill.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "locators.h"
33
34 #include <sys/cdefs.h>
35
36 __KERNEL_RCSID(1, "$NetBSD: exynos_uart.c,v 1.7 2022/10/26 23:38:07 riastradh Exp $");
37
38 #define cn_trap() \
39 do { \
40 console_debugger(); \
41 cn_trapped = 1; \
42 } while (/* CONSTCOND */ 0)
43
44 #include <sys/param.h>
45 #include <sys/bus.h>
46 #include <sys/device.h>
47 #include <sys/conf.h>
48 #include <sys/intr.h>
49 #include <sys/systm.h>
50 #include <sys/time.h>
51 #include <sys/termios.h>
52 #include <sys/kauth.h>
53 #include <sys/lwp.h>
54 #include <sys/tty.h>
55
56 #include <ddb/db_active.h>
57
58 #include <dev/cons.h>
59
60 #include <dev/fdt/fdtvar.h>
61
62 #include <arm/samsung/sscom_reg.h>
63
64 static int exynos_uart_match(device_t, cfdata_t, void *);
65 static void exynos_uart_attach(device_t, device_t, void *);
66
67 static int exynos_uart_intr(void *);
68
69 static int exynos_uart_cngetc(dev_t);
70 static void exynos_uart_cnputc(dev_t, int);
71 static void exynos_uart_cnpollc(dev_t, int);
72
73 static void exynos_uart_start(struct tty *);
74 static int exynos_uart_param(struct tty *, struct termios *);
75
76 extern struct cfdriver exuart_cd;
77
78 enum exynos_uart_type {
79 EXYNOS_UART_SAMSUNG,
80 EXYNOS_UART_APPLE,
81 };
82
83 struct exynos_uart_config {
84 enum exynos_uart_type type;
85 uint32_t rxfull;
86 uint32_t txfull;
87 uint32_t rxcount;
88 };
89
90 struct exynos_uart_softc {
91 device_t sc_dev;
92 bus_space_tag_t sc_bst;
93 bus_space_handle_t sc_bsh;
94 kmutex_t sc_lock;
95 u_int sc_freq;
96 void *sc_ih;
97
98 bool sc_console;
99 struct tty *sc_tty;
100
101 int sc_ospeed;
102 tcflag_t sc_cflag;
103
104 const struct exynos_uart_config *sc_conf;
105
106 u_char sc_buf[1024];
107 };
108
109 #define RD4(sc, reg) \
110 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
111 #define WR4(sc, reg, val) \
112 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
113
114 static bus_addr_t exynos_uart_consaddr;
115
116 static struct exynos_uart_softc exynos_uart_cnsc;
117
118 static struct cnm_state exynos_uart_cnm_state;
119
120 struct consdev exynos_uart_consdev = {
121 .cn_getc = exynos_uart_cngetc,
122 .cn_putc = exynos_uart_cnputc,
123 .cn_pollc = exynos_uart_cnpollc,
124 .cn_dev = NODEV,
125 .cn_pri = CN_NORMAL,
126 };
127
128 static dev_type_open(exynos_uart_open);
129 static dev_type_open(exynos_uart_close);
130 static dev_type_read(exynos_uart_read);
131 static dev_type_write(exynos_uart_write);
132 static dev_type_ioctl(exynos_uart_ioctl);
133 static dev_type_tty(exynos_uart_tty);
134 static dev_type_poll(exynos_uart_poll);
135 static dev_type_stop(exynos_uart_stop);
136
137 const struct cdevsw exuart_cdevsw = {
138 .d_open = exynos_uart_open,
139 .d_close = exynos_uart_close,
140 .d_read = exynos_uart_read,
141 .d_write = exynos_uart_write,
142 .d_ioctl = exynos_uart_ioctl,
143 .d_stop = exynos_uart_stop,
144 .d_tty = exynos_uart_tty,
145 .d_poll = exynos_uart_poll,
146 .d_mmap = nommap,
147 .d_kqfilter = ttykqfilter,
148 .d_discard = nodiscard,
149 .d_flag = D_TTY
150 };
151
152 static int exynos_uart_cmajor = -1;
153
154 static const struct exynos_uart_config exynos_uart_samsung = {
155 .type = EXYNOS_UART_SAMSUNG,
156 .rxfull = UFSTAT_RXFULL,
157 .txfull = UFSTAT_TXFULL,
158 .rxcount = UFSTAT_RXCOUNT,
159 };
160
161 static const struct exynos_uart_config exynos_uart_apple = {
162 .type = EXYNOS_UART_APPLE,
163 .rxfull = UFSTAT_S5L_RXFULL,
164 .txfull = UFSTAT_S5L_TXFULL,
165 .rxcount = UFSTAT_S5L_RXCOUNT,
166 };
167
168 static const struct device_compatible_entry compat_data[] = {
169 { .compat = "samsung,exynos4210-uart", .data = &exynos_uart_samsung },
170 { .compat = "apple,s5l-uart", .data = &exynos_uart_apple },
171 DEVICE_COMPAT_EOL
172 };
173
174 CFATTACH_DECL_NEW(exynos_uart, sizeof(struct exynos_uart_softc),
175 exynos_uart_match, exynos_uart_attach, NULL, NULL);
176
177 static int
exynos_uart_match(device_t parent,cfdata_t cf,void * aux)178 exynos_uart_match(device_t parent, cfdata_t cf, void *aux)
179 {
180 struct fdt_attach_args * const faa = aux;
181
182 return of_compatible_match(faa->faa_phandle, compat_data);
183 }
184
185 static void
exynos_uart_attach(device_t parent,device_t self,void * aux)186 exynos_uart_attach(device_t parent, device_t self, void *aux)
187 {
188 struct exynos_uart_softc * const sc = device_private(self);
189 struct fdt_attach_args * const faa = aux;
190 const int phandle = faa->faa_phandle;
191 char intrstr[128];
192 struct clk *clk_uart, *clk_uart_baud0;
193 struct tty *tp;
194 int major, minor;
195 bus_addr_t addr;
196 bus_size_t size;
197 uint32_t ucon;
198
199 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
200 aprint_error(": couldn't get registers\n");
201 return;
202 }
203 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
204 aprint_error(": failed to decode interrupt\n");
205 return;
206 }
207 clk_uart = fdtbus_clock_get(phandle, "uart");
208 if (clk_uart == NULL || clk_enable(clk_uart) != 0) {
209 aprint_error(": failed to enable uart clock\n");
210 return;
211 }
212 clk_uart_baud0 = fdtbus_clock_get(phandle, "clk_uart_baud0");
213 if (clk_uart_baud0 == NULL || clk_enable(clk_uart_baud0) != 0) {
214 aprint_error(": failed to enable clk_uart_baud0 clock\n");
215 return;
216 }
217
218 const bool is_console = exynos_uart_consaddr == addr;
219
220 sc->sc_dev = self;
221 sc->sc_bst = faa->faa_bst;
222 sc->sc_conf = of_compatible_lookup(phandle, compat_data)->data;
223 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
224 sc->sc_console = is_console;
225 if (is_console) {
226 sc->sc_bsh = exynos_uart_cnsc.sc_bsh;
227 } else {
228 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
229 aprint_error(": failed to map registers\n");
230 return;
231 }
232 }
233 sc->sc_freq = clk_get_rate(clk_uart_baud0);
234
235 sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SERIAL,
236 0, exynos_uart_intr, sc, device_xname(self));
237 if (sc->sc_ih == NULL) {
238 aprint_error(": failed to establish interrupt on %s\n",
239 intrstr);
240 return;
241 }
242
243 if (exynos_uart_cmajor == -1) {
244 /* allocate a major number */
245 int bmajor = -1, cmajor = -1;
246 int error = devsw_attach("exuart", NULL, &bmajor,
247 &exuart_cdevsw, &cmajor);
248 if (error) {
249 aprint_error(": couldn't allocate major number\n");
250 return;
251 }
252 exynos_uart_cmajor = cmajor;
253 }
254
255 major = cdevsw_lookup_major(&exuart_cdevsw);
256 minor = device_unit(self);
257
258 tp = sc->sc_tty = tty_alloc();
259 tp->t_oproc = exynos_uart_start;
260 tp->t_param = exynos_uart_param;
261 tp->t_dev = makedev(major, minor);
262 tp->t_sc = sc;
263 tty_attach(tp);
264
265 aprint_naive("\n");
266 if (is_console) {
267 cn_tab->cn_dev = tp->t_dev;
268 aprint_normal(": console");
269 }
270 aprint_normal("\n");
271
272 if (is_console)
273 delay(10000);
274
275 /* Initialize device */
276 WR4(sc, SSCOM_UFCON,
277 __SHIFTIN(2, UFCON_TXTRIGGER) |
278 __SHIFTIN(1, UFCON_RXTRIGGER) |
279 UFCON_TXFIFO_RESET | UFCON_RXFIFO_RESET |
280 UFCON_FIFO_ENABLE);
281
282 /* Configure PIO mode with RX timeout interrupts */
283 ucon = UCON_TOINT | UCON_ERRINT |
284 UCON_TXMODE_INT | UCON_RXMODE_INT;
285 WR4(sc, SSCOM_UCON, ucon);
286
287 switch (sc->sc_conf->type) {
288 case EXYNOS_UART_SAMSUNG:
289 WR4(sc, SSCOM_UCON, ucon | __SHIFTIN(3, UCON_RXTO));
290 /* Disable interrupts */
291 WR4(sc, SSCOM_UINTM, ~0u);
292 break;
293 case EXYNOS_UART_APPLE:
294 break;
295 }
296
297 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
298 }
299
300 static int
exynos_uart_cngetc(dev_t dev)301 exynos_uart_cngetc(dev_t dev)
302 {
303 struct exynos_uart_softc * const sc = &exynos_uart_cnsc;
304 uint32_t ufstat;
305 int s, c;
306
307 s = splserial();
308
309 ufstat = RD4(sc, SSCOM_UFSTAT);
310 if (__SHIFTOUT(ufstat, sc->sc_conf->rxcount) == 0) {
311 splx(s);
312 return -1;
313 }
314
315 c = RD4(sc, SSCOM_URXH);
316 if (!db_active) {
317 int cn_trapped __unused = 0;
318 cn_check_magic(dev, c & 0xff, exynos_uart_cnm_state);
319 }
320
321 splx(s);
322
323 return c & 0xff;
324 }
325
326 static void
exynos_uart_cnputc(dev_t dev,int c)327 exynos_uart_cnputc(dev_t dev, int c)
328 {
329 struct exynos_uart_softc * const sc = &exynos_uart_cnsc;
330 int s;
331
332 s = splserial();
333 while ((RD4(sc, SSCOM_UFSTAT) & sc->sc_conf->txfull) != 0)
334 ;
335
336 WR4(sc, SSCOM_UTXH, c & 0xff);
337
338 splx(s);
339 }
340
341
342 static void
exynos_uart_cnpollc(dev_t dev,int on)343 exynos_uart_cnpollc(dev_t dev, int on)
344 {
345 }
346
347 static void
exynos_uart_cnattach(bus_space_tag_t bst,bus_space_handle_t bsh,int ospeed,tcflag_t cflag,const struct exynos_uart_config * conf)348 exynos_uart_cnattach(bus_space_tag_t bst, bus_space_handle_t bsh,
349 int ospeed, tcflag_t cflag, const struct exynos_uart_config *conf)
350 {
351 struct exynos_uart_softc *sc = &exynos_uart_cnsc;
352
353 cn_tab = &exynos_uart_consdev;
354 cn_init_magic(&exynos_uart_cnm_state);
355 cn_set_magic("\047\001");
356
357 sc->sc_bst = bst;
358 sc->sc_bsh = bsh;
359 sc->sc_ospeed = ospeed;
360 sc->sc_cflag = cflag;
361 sc->sc_conf = conf;
362 }
363
364 static int
exynos_uart_open(dev_t dev,int flag,int mode,lwp_t * l)365 exynos_uart_open(dev_t dev, int flag, int mode, lwp_t *l)
366 {
367 struct exynos_uart_softc *sc =
368 device_lookup_private(&exuart_cd, minor(dev));
369 struct tty *tp = sc->sc_tty;
370 uint32_t ucon;
371
372 if (kauth_authorize_device_tty(l->l_cred,
373 KAUTH_DEVICE_TTY_OPEN, tp) != 0) {
374 return EBUSY;
375 }
376
377 mutex_enter(&sc->sc_lock);
378
379 if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
380 tp->t_dev = dev;
381 ttychars(tp);
382 tp->t_iflag = TTYDEF_IFLAG;
383 tp->t_oflag = TTYDEF_OFLAG;
384 tp->t_lflag = TTYDEF_LFLAG;
385 if (sc->sc_console) {
386 tp->t_ispeed = tp->t_ospeed = exynos_uart_cnsc.sc_ospeed;
387 tp->t_cflag = exynos_uart_cnsc.sc_cflag;
388 } else {
389 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
390 tp->t_cflag = TTYDEF_CFLAG;
391 }
392 ttsetwater(tp);
393 }
394 tp->t_state |= TS_CARR_ON;
395
396 /* Enable RX and error interrupts */
397 switch (sc->sc_conf->type) {
398 case EXYNOS_UART_SAMSUNG:
399 WR4(sc, SSCOM_UINTM, ~0u & ~(UINT_RXD|UINT_ERROR));
400 break;
401 case EXYNOS_UART_APPLE:
402 ucon = RD4(sc, SSCOM_UCON);
403 ucon |= UCON_S5L_RXTHRESH | UCON_S5L_RX_TIMEOUT;
404 WR4(sc, SSCOM_UCON, ucon);
405 break;
406 }
407
408 mutex_exit(&sc->sc_lock);
409
410 return tp->t_linesw->l_open(dev, tp);
411 }
412
413 static int
exynos_uart_close(dev_t dev,int flag,int mode,lwp_t * l)414 exynos_uart_close(dev_t dev, int flag, int mode, lwp_t *l)
415 {
416 struct exynos_uart_softc *sc =
417 device_lookup_private(&exuart_cd, minor(dev));
418 struct tty *tp = sc->sc_tty;
419 uint32_t ucon;
420
421 mutex_enter(&sc->sc_lock);
422
423 tp->t_linesw->l_close(tp, flag);
424 ttyclose(tp);
425
426 /* Disable interrupts */
427 switch (sc->sc_conf->type) {
428 case EXYNOS_UART_SAMSUNG:
429 WR4(sc, SSCOM_UINTM, ~0u);
430 break;
431 case EXYNOS_UART_APPLE:
432 ucon = RD4(sc, SSCOM_UCON);
433 ucon &= ~(UCON_S5L_RXTHRESH | UCON_S5L_RX_TIMEOUT);
434 WR4(sc, SSCOM_UCON, ucon);
435 break;
436 }
437
438 mutex_exit(&sc->sc_lock);
439
440 return 0;
441 }
442
443 static int
exynos_uart_read(dev_t dev,struct uio * uio,int flag)444 exynos_uart_read(dev_t dev, struct uio *uio, int flag)
445 {
446 struct exynos_uart_softc *sc =
447 device_lookup_private(&exuart_cd, minor(dev));
448 struct tty *tp = sc->sc_tty;
449
450 return tp->t_linesw->l_read(tp, uio, flag);
451 }
452
453 static int
exynos_uart_write(dev_t dev,struct uio * uio,int flag)454 exynos_uart_write(dev_t dev, struct uio *uio, int flag)
455 {
456 struct exynos_uart_softc *sc =
457 device_lookup_private(&exuart_cd, minor(dev));
458 struct tty *tp = sc->sc_tty;
459
460 return tp->t_linesw->l_write(tp, uio, flag);
461 }
462
463 static int
exynos_uart_poll(dev_t dev,int events,lwp_t * l)464 exynos_uart_poll(dev_t dev, int events, lwp_t *l)
465 {
466 struct exynos_uart_softc *sc =
467 device_lookup_private(&exuart_cd, minor(dev));
468 struct tty *tp = sc->sc_tty;
469
470 return tp->t_linesw->l_poll(tp, events, l);
471 }
472
473 static int
exynos_uart_ioctl(dev_t dev,u_long cmd,void * data,int flag,lwp_t * l)474 exynos_uart_ioctl(dev_t dev, u_long cmd, void *data, int flag, lwp_t *l)
475 {
476 struct exynos_uart_softc *sc =
477 device_lookup_private(&exuart_cd, minor(dev));
478 struct tty *tp = sc->sc_tty;
479 int error;
480
481 error = tp->t_linesw->l_ioctl(tp, cmd, data, flag, l);
482 if (error != EPASSTHROUGH)
483 return error;
484
485 return ttioctl(tp, cmd, data, flag, l);
486 }
487
488 static struct tty *
exynos_uart_tty(dev_t dev)489 exynos_uart_tty(dev_t dev)
490 {
491 struct exynos_uart_softc *sc =
492 device_lookup_private(&exuart_cd, minor(dev));
493
494 return sc->sc_tty;
495 }
496
497 static void
exynos_uart_stop(struct tty * tp,int flag)498 exynos_uart_stop(struct tty *tp, int flag)
499 {
500 }
501
502 static void
exynos_uart_start(struct tty * tp)503 exynos_uart_start(struct tty *tp)
504 {
505 struct exynos_uart_softc *sc = tp->t_sc;
506 u_char *p = sc->sc_buf;
507 int s, brem;
508
509 s = spltty();
510
511 if (tp->t_state & (TS_TTSTOP | TS_BUSY | TS_TIMEOUT)) {
512 splx(s);
513 return;
514 }
515 tp->t_state |= TS_BUSY;
516
517 for (brem = q_to_b(&tp->t_outq, sc->sc_buf, sizeof(sc->sc_buf));
518 brem > 0;
519 brem--, p++) {
520 while ((RD4(sc, SSCOM_UFSTAT) & sc->sc_conf->txfull) != 0)
521 ;
522
523 WR4(sc, SSCOM_UTXH, *p);
524 }
525
526 tp->t_state &= ~TS_BUSY;
527 if (ttypull(tp)) {
528 tp->t_state |= TS_TIMEOUT;
529 callout_schedule(&tp->t_rstrt_ch, 1);
530 }
531 splx(s);
532 }
533
534 static int
exynos_uart_param(struct tty * tp,struct termios * t)535 exynos_uart_param(struct tty *tp, struct termios *t)
536 {
537 struct exynos_uart_softc *sc = tp->t_sc;
538
539 mutex_enter(&sc->sc_lock);
540
541 if (tp->t_cflag != t->c_cflag) {
542 uint32_t ulcon = 0;
543 switch (ISSET(t->c_cflag, CSIZE)) {
544 case CS5:
545 ulcon |= ULCON_LENGTH_5;
546 break;
547 case CS6:
548 ulcon |= ULCON_LENGTH_6;
549 break;
550 case CS7:
551 ulcon |= ULCON_LENGTH_7;
552 break;
553 case CS8:
554 ulcon |= ULCON_LENGTH_8;
555 break;
556 }
557 switch (ISSET(t->c_cflag, PARENB|PARODD)) {
558 case PARENB|PARODD:
559 ulcon |= ULCON_PARITY_ODD;
560 break;
561 case PARENB:
562 ulcon |= ULCON_PARITY_EVEN;
563 break;
564 default:
565 ulcon |= ULCON_PARITY_NONE;
566 break;
567 }
568 if (ISSET(t->c_cflag, CSTOPB))
569 ulcon |= ULCON_STOP;
570 WR4(sc, SSCOM_ULCON, ulcon);
571 }
572
573 if (tp->t_ospeed != t->c_ospeed) {
574 const uint32_t ubrdiv = (sc->sc_freq / 16) / t->c_ospeed - 1;
575 WR4(sc, SSCOM_UBRDIV, ubrdiv);
576 }
577
578 tp->t_ispeed = t->c_ispeed;
579 tp->t_ospeed = t->c_ospeed;
580 tp->t_cflag = t->c_cflag;
581
582 mutex_exit(&sc->sc_lock);
583
584 return 0;
585 }
586
587 static int
exynos_uart_intr(void * priv)588 exynos_uart_intr(void *priv)
589 {
590 struct exynos_uart_softc *sc = priv;
591 struct tty *tp = sc->sc_tty;
592 uint32_t ack, uerstat, ufstat, c;
593
594 mutex_enter(&sc->sc_lock);
595
596 if (sc->sc_conf->type == EXYNOS_UART_APPLE) {
597 ack = RD4(sc, SSCOM_UTRSTAT);
598 } else {
599 ack = RD4(sc, SSCOM_UINTP);
600 }
601
602 for (;;) {
603 int cn_trapped = 0;
604
605 uerstat = RD4(sc, SSCOM_UERSTAT);
606 if (uerstat & UERSTAT_BREAK) {
607 cn_check_magic(tp->t_dev, CNC_BREAK,
608 exynos_uart_cnm_state);
609 if (cn_trapped)
610 continue;
611 }
612
613 ufstat = RD4(sc, SSCOM_UFSTAT);
614 if (__SHIFTOUT(ufstat, sc->sc_conf->rxcount) == 0) {
615 break;
616 }
617
618 c = RD4(sc, SSCOM_URXH);
619 cn_check_magic(tp->t_dev, c & 0xff, exynos_uart_cnm_state);
620 if (cn_trapped)
621 continue;
622 tp->t_linesw->l_rint(c & 0xff, tp);
623 }
624
625 if (sc->sc_conf->type == EXYNOS_UART_APPLE) {
626 WR4(sc, SSCOM_UTRSTAT, ack);
627 } else {
628 WR4(sc, SSCOM_UINTP, ack);
629 }
630
631 mutex_exit(&sc->sc_lock);
632
633 return 1;
634 }
635
636 /*
637 * Console support
638 */
639
640 static int
exynos_uart_console_match(int phandle)641 exynos_uart_console_match(int phandle)
642 {
643 return of_compatible_match(phandle, compat_data);
644 }
645
646 static void
exynos_uart_console_consinit(struct fdt_attach_args * faa,u_int uart_freq)647 exynos_uart_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
648 {
649 const int phandle = faa->faa_phandle;
650 bus_space_tag_t bst = faa->faa_bst;
651 bus_space_handle_t bsh;
652 bus_addr_t addr;
653 bus_size_t size;
654 tcflag_t flags;
655 int speed;
656 const struct exynos_uart_config *conf;
657
658 speed = fdtbus_get_stdout_speed();
659 if (speed < 0)
660 speed = 115200; /* default */
661 flags = fdtbus_get_stdout_flags();
662 conf = of_compatible_lookup(phandle, compat_data)->data;
663
664 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0)
665 panic("exynos_uart: couldn't get registers");
666 if (bus_space_map(bst, addr, size, 0, &bsh) != 0)
667 panic("exynos_uart: couldn't map registers");
668
669 exynos_uart_consaddr = addr;
670
671 exynos_uart_cnattach(bst, bsh, speed, flags, conf);
672 }
673
674 static const struct fdt_console exynos_uart_console = {
675 .match = exynos_uart_console_match,
676 .consinit = exynos_uart_console_consinit,
677 };
678
679 FDT_CONSOLE(exynos_uart, &exynos_uart_console);
680