xref: /netbsd-src/sys/arch/arm/nxp/imx_sdhc.c (revision a33a6c43803dc8b884b646dc14983a964a1581b3)
1*a33a6c43Sbouyer /*	$NetBSD: imx_sdhc.c,v 1.8 2023/05/04 13:29:33 bouyer Exp $	*/
28644267aSskrll 
38644267aSskrll /*-
48644267aSskrll  * Copyright (c) 2019 Genetec Corporation.  All rights reserved.
58644267aSskrll  * Written by Hashimoto Kenichi for Genetec Corporation.
68644267aSskrll  *
78644267aSskrll  * Redistribution and use in source and binary forms, with or without
88644267aSskrll  * modification, are permitted provided that the following conditions
98644267aSskrll  * are met:
108644267aSskrll  * 1. Redistributions of source code must retain the above copyright
118644267aSskrll  *    notice, this list of conditions and the following disclaimer.
128644267aSskrll  * 2. Redistributions in binary form must reproduce the above copyright
138644267aSskrll  *    notice, this list of conditions and the following disclaimer in the
148644267aSskrll  *    documentation and/or other materials provided with the distribution.
158644267aSskrll  *
168644267aSskrll  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
178644267aSskrll  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
188644267aSskrll  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
198644267aSskrll  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
208644267aSskrll  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
218644267aSskrll  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
228644267aSskrll  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
238644267aSskrll  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
248644267aSskrll  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
258644267aSskrll  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
268644267aSskrll  * SUCH DAMAGE.
278644267aSskrll  */
288644267aSskrll 
298644267aSskrll #include <sys/cdefs.h>
30*a33a6c43Sbouyer __KERNEL_RCSID(0, "$NetBSD: imx_sdhc.c,v 1.8 2023/05/04 13:29:33 bouyer Exp $");
318644267aSskrll 
328644267aSskrll #include "opt_fdt.h"
338644267aSskrll 
348644267aSskrll #include <sys/param.h>
358644267aSskrll #include <sys/bus.h>
368644267aSskrll #include <sys/device.h>
378644267aSskrll #include <sys/intr.h>
388644267aSskrll #include <sys/systm.h>
398644267aSskrll #include <sys/kernel.h>
408644267aSskrll #include <sys/gpio.h>
418644267aSskrll 
428644267aSskrll #include <dev/sdmmc/sdhcreg.h>
438644267aSskrll #include <dev/sdmmc/sdhcvar.h>
448644267aSskrll #include <dev/sdmmc/sdmmcvar.h>
458644267aSskrll 
468644267aSskrll #include <dev/fdt/fdtvar.h>
478644267aSskrll 
488644267aSskrll static int imx_sdhc_match(device_t, cfdata_t, void *);
498644267aSskrll static void imx_sdhc_attach(device_t, device_t, void *);
508644267aSskrll 
518644267aSskrll static int imx_sdhc_card_detect(struct sdhc_softc *);
528644267aSskrll static int imx_sdhc_write_protect(struct sdhc_softc *);
538644267aSskrll 
548644267aSskrll struct imx_sdhc_softc {
558644267aSskrll 	struct sdhc_softc sc_sdhc;
568644267aSskrll 
578644267aSskrll 	bus_space_tag_t		sc_bst;
588644267aSskrll 	bus_space_handle_t	sc_bsh;
598644267aSskrll 	bus_size_t		sc_bsz;
608644267aSskrll 
618644267aSskrll 	struct sdhc_host	*sc_host;
628644267aSskrll 	void			*sc_ih;
638644267aSskrll 
648644267aSskrll 	struct clk		*sc_clk_per;
658644267aSskrll 	struct fdtbus_regulator	*sc_vmmc_supply;
668644267aSskrll 
678644267aSskrll 	struct fdtbus_gpio_pin	*sc_pin_cd;
688644267aSskrll 	struct fdtbus_gpio_pin	*sc_pin_wp;
698644267aSskrll };
708644267aSskrll 
718644267aSskrll CFATTACH_DECL_NEW(imx_sdhc, sizeof(struct imx_sdhc_softc),
728644267aSskrll 	imx_sdhc_match, imx_sdhc_attach, NULL, NULL);
738644267aSskrll 
748644267aSskrll struct imx6_sdhc_config {
758644267aSskrll 	uint32_t		flags;
768644267aSskrll };
778644267aSskrll 
788644267aSskrll static const struct imx6_sdhc_config imx6q_config = {
798644267aSskrll 	.flags = SDHC_FLAG_BROKEN_ADMA2_ZEROLEN |
808644267aSskrll 		 SDHC_FLAG_NO_BUSY_INTR,
818644267aSskrll };
828644267aSskrll 
838644267aSskrll static const struct imx6_sdhc_config imx7d_config = {
848644267aSskrll 	.flags = 0
858644267aSskrll };
868644267aSskrll 
87646c0f59Sthorpej static const struct device_compatible_entry compat_data[] = {
88646c0f59Sthorpej 	{ .compat = "fsl,imx6q-usdhc",	.data = &imx6q_config },
89*a33a6c43Sbouyer 	{ .compat = "fsl,imx6sx-usdhc",	.data = &imx6q_config },
90646c0f59Sthorpej 	{ .compat = "fsl,imx7d-usdhc",	.data = &imx7d_config },
91ec189949Sthorpej 	DEVICE_COMPAT_EOL
928644267aSskrll };
938644267aSskrll 
948644267aSskrll static int
imx_sdhc_match(device_t parent,cfdata_t cf,void * aux)958644267aSskrll imx_sdhc_match(device_t parent, cfdata_t cf, void *aux)
968644267aSskrll {
978644267aSskrll 	struct fdt_attach_args * const faa = aux;
988644267aSskrll 
996e54367aSthorpej 	return of_compatible_match(faa->faa_phandle, compat_data);
1008644267aSskrll }
1018644267aSskrll 
1028644267aSskrll static void
imx_sdhc_attach(device_t parent,device_t self,void * aux)1038644267aSskrll imx_sdhc_attach(device_t parent, device_t self, void *aux)
1048644267aSskrll {
1058644267aSskrll 	struct imx_sdhc_softc * const sc = device_private(self);
1068644267aSskrll 	struct fdt_attach_args * const faa = aux;
1078644267aSskrll 	const int phandle = faa->faa_phandle;
1088644267aSskrll 	const struct imx6_sdhc_config *conf;
1098644267aSskrll 	char intrstr[128];
1108644267aSskrll 	bus_addr_t addr;
1118644267aSskrll 	bus_size_t size;
1128644267aSskrll 	u_int bus_width;
1138644267aSskrll 	int error;
1148644267aSskrll 
1158644267aSskrll 	fdtbus_clock_assign(phandle);
1168644267aSskrll 
1178644267aSskrll 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
1188644267aSskrll 		aprint_error(": couldn't get registers\n");
1198644267aSskrll 		return;
1208644267aSskrll 	}
1218644267aSskrll 
1228644267aSskrll 	sc->sc_clk_per = fdtbus_clock_get(phandle, "per");
1238644267aSskrll 	if (sc->sc_clk_per == NULL) {
1248644267aSskrll 		aprint_error(": couldn't get clock\n");
1258644267aSskrll 		return;
1268644267aSskrll 	}
1278644267aSskrll 
1288644267aSskrll 	if (of_getprop_uint32(phandle, "bus-width", &bus_width))
1298644267aSskrll 		bus_width = 4;
1308644267aSskrll 
1318644267aSskrll 	sc->sc_vmmc_supply = fdtbus_regulator_acquire(phandle, "vmmc-supply");
1328644267aSskrll 
1336e54367aSthorpej 	conf = of_compatible_lookup(phandle, compat_data)->data;
1348644267aSskrll 
1358644267aSskrll 	sc->sc_sdhc.sc_dev = self;
1368644267aSskrll 	sc->sc_sdhc.sc_dmat = faa->faa_dmat;
1378644267aSskrll 
1388644267aSskrll 	sc->sc_sdhc.sc_clkbase = clk_get_rate(sc->sc_clk_per) / 1000;
1398644267aSskrll 	sc->sc_sdhc.sc_flags =
1408644267aSskrll 	    SDHC_FLAG_USE_DMA |
1418644267aSskrll 	    SDHC_FLAG_NO_PWR0 |
1428644267aSskrll 	    SDHC_FLAG_HAVE_DVS |
1438644267aSskrll 	    SDHC_FLAG_32BIT_ACCESS |
1448644267aSskrll 	    SDHC_FLAG_USDHC;
1458644267aSskrll 	sc->sc_sdhc.sc_flags |= conf->flags;
1468644267aSskrll 
1478644267aSskrll 	if (bus_width == 8)
1488644267aSskrll 		sc->sc_sdhc.sc_flags |= SDHC_FLAG_8BIT_MODE;
1498644267aSskrll 	if (of_hasprop(phandle, "no-1-8-v"))
1508644267aSskrll 		sc->sc_sdhc.sc_flags |= SDHC_FLAG_NO_1_8_V;
1518644267aSskrll 
1528644267aSskrll 	sc->sc_sdhc.sc_host = &sc->sc_host;
1538644267aSskrll 
1548644267aSskrll 	sc->sc_bst = faa->faa_bst;
1558644267aSskrll 	error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
1568644267aSskrll 	if (error) {
1578644267aSskrll 		aprint_error(": couldn't map %#" PRIxBUSADDR ": %d", addr, error);
1588644267aSskrll 		return;
1598644267aSskrll 	}
1608644267aSskrll 	sc->sc_bsz = size;
1618644267aSskrll 
1628644267aSskrll 	sc->sc_pin_cd = fdtbus_gpio_acquire(phandle,
1638644267aSskrll 	    "cd-gpios", GPIO_PIN_INPUT);
1648644267aSskrll 	if (sc->sc_pin_cd) {
1658644267aSskrll 		sc->sc_sdhc.sc_vendor_card_detect = imx_sdhc_card_detect;
1668644267aSskrll 		sc->sc_sdhc.sc_flags |= SDHC_FLAG_POLL_CARD_DET;
1678644267aSskrll 	}
1688644267aSskrll 
1698644267aSskrll 	sc->sc_pin_wp = fdtbus_gpio_acquire(phandle,
1708644267aSskrll 	    "wp-gpios", GPIO_PIN_INPUT);
1718644267aSskrll 	if (sc->sc_pin_wp) {
1728644267aSskrll 		sc->sc_sdhc.sc_vendor_write_protect = imx_sdhc_write_protect;
1738644267aSskrll 	}
1748644267aSskrll 
1758644267aSskrll 	error = clk_enable(sc->sc_clk_per);
1768644267aSskrll 	if (error) {
1778644267aSskrll 		aprint_error(": couldn't enable clock: %d\n", error);
1788644267aSskrll 		return;
1798644267aSskrll 	}
1808644267aSskrll 
1818644267aSskrll 	if (sc->sc_vmmc_supply != NULL) {
1828644267aSskrll 		error = fdtbus_regulator_enable(sc->sc_vmmc_supply);
1838644267aSskrll 		if (error) {
1848644267aSskrll 			aprint_error(": couldn't enable vmmc supply: %d\n", error);
1858644267aSskrll 			return;
1868644267aSskrll 		}
1878644267aSskrll 	}
1888644267aSskrll 
1898644267aSskrll 	aprint_naive("\n");
1908644267aSskrll 	aprint_normal(": SDMMC (%u kHz)\n", sc->sc_sdhc.sc_clkbase);
1918644267aSskrll 
1928644267aSskrll 	if (sc->sc_sdhc.sc_clkbase == 0) {
1938644267aSskrll 		aprint_error_dev(self, "couldn't determine frequency\n");
1948644267aSskrll 		return;
1958644267aSskrll 	}
1968644267aSskrll 
1978644267aSskrll 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
1988644267aSskrll 		aprint_error_dev(self, "failed to decode interrupt\n");
1998644267aSskrll 		return;
2008644267aSskrll 	}
2018644267aSskrll 
20282b8374aSjmcneill 	sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SDMMC,
20382b8374aSjmcneill 	    FDT_INTR_MPSAFE, sdhc_intr, &sc->sc_sdhc, device_xname(self));
2048644267aSskrll 	if (sc->sc_ih == NULL) {
2058644267aSskrll 		aprint_error_dev(self, "couldn't establish interrupt on %s\n",
2068644267aSskrll 		    intrstr);
2078644267aSskrll 		return;
2088644267aSskrll 	}
2098644267aSskrll 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
2108644267aSskrll 
2118644267aSskrll 	error = sdhc_host_found(&sc->sc_sdhc, sc->sc_bst, sc->sc_bsh, sc->sc_bsz);
2128644267aSskrll 	if (error) {
2138644267aSskrll 		aprint_error_dev(self, "couldn't initialize host, error = %d\n",
2148644267aSskrll 		    error);
2158644267aSskrll 		fdtbus_intr_disestablish(phandle, sc->sc_ih);
2168644267aSskrll 		sc->sc_ih = NULL;
2178644267aSskrll 		return;
2188644267aSskrll 	}
2198644267aSskrll }
2208644267aSskrll 
2218644267aSskrll static int
imx_sdhc_card_detect(struct sdhc_softc * ssc)2228644267aSskrll imx_sdhc_card_detect(struct sdhc_softc *ssc)
2238644267aSskrll {
2248644267aSskrll 	struct imx_sdhc_softc *sc = device_private(ssc->sc_dev);
2258644267aSskrll 
2268644267aSskrll 	KASSERT(sc->sc_pin_cd != NULL);
2278644267aSskrll 
2288644267aSskrll 	return fdtbus_gpio_read(sc->sc_pin_cd);
2298644267aSskrll }
2308644267aSskrll 
2318644267aSskrll static int
imx_sdhc_write_protect(struct sdhc_softc * ssc)2328644267aSskrll imx_sdhc_write_protect(struct sdhc_softc *ssc)
2338644267aSskrll {
2348644267aSskrll 	struct imx_sdhc_softc *sc = device_private(ssc->sc_dev);
2358644267aSskrll 
2368644267aSskrll 	KASSERT(sc->sc_pin_wp != NULL);
2378644267aSskrll 
2388644267aSskrll 	return fdtbus_gpio_read(sc->sc_pin_wp);
2398644267aSskrll }
2408644267aSskrll 
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