xref: /netbsd-src/sys/arch/arm/ixp12x0/ixp12x0_io.c (revision 30ba21540f737b3d029b915d1d262a41c81df6da)
1 /*	$NetBSD: ixp12x0_io.c,v 1.19 2023/04/21 15:00:48 skrll Exp $ */
2 
3 /*
4  * Copyright (c) 2002, 2003
5  *	Ichiro FUKUHARA <ichiro@ichiro.org>.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
21  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29 
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: ixp12x0_io.c,v 1.19 2023/04/21 15:00:48 skrll Exp $");
32 
33 /*
34  * bus_space I/O functions for ixp12x0
35  */
36 
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/queue.h>
40 
41 #include <uvm/uvm.h>
42 
43 #include <sys/bus.h>
44 
45 #include <arm/ixp12x0/ixp12x0reg.h>
46 #include <arm/ixp12x0/ixp12x0var.h>
47 
48 /* Proto types for all the bus_space structure functions */
49 bs_protos(ixp12x0);
50 bs_protos(generic);
51 bs_protos(generic_armv4);
52 bs_protos(bs_notimpl);
53 
54 struct bus_space ixp12x0_bs_tag = {
55 	/* cookie */
56 	.bs_cookie = (void *) 0,
57 
58 	/* mapping/unmapping */
59 	.bs_map = ixp12x0_bs_map,
60 	.bs_unmap = ixp12x0_bs_unmap,
61 	.bs_subregion = ixp12x0_bs_subregion,
62 
63 	/* allocation/deallocation */
64 	.bs_alloc = ixp12x0_bs_alloc,
65 	.bs_free = ixp12x0_bs_free,
66 
67 	/* get kernel virtual address */
68 	.bs_vaddr = ixp12x0_bs_vaddr,
69 
70 	/* mmap bus space for userland */
71 	.bs_mmap = bs_notimpl_bs_mmap,
72 
73 	/* barrier */
74 	.bs_barrier = ixp12x0_bs_barrier,
75 
76 	/* read (single) */
77 	.bs_r_1 = generic_bs_r_1,
78 	.bs_r_2 = generic_armv4_bs_r_2,
79 	.bs_r_4 = generic_bs_r_4,
80 	.bs_r_8 = bs_notimpl_bs_r_8,
81 
82 	/* read multiple */
83 	.bs_rm_1 = generic_bs_rm_1,
84 	.bs_rm_2 = generic_armv4_bs_rm_2,
85 	.bs_rm_4 = generic_bs_rm_4,
86 	.bs_rm_8 = bs_notimpl_bs_rm_8,
87 
88 	/* read region */
89 	.bs_rr_1 = generic_bs_rr_1,
90 	.bs_rr_2 = generic_armv4_bs_rr_2,
91 	.bs_rr_4 = generic_bs_rr_4,
92 	.bs_rr_8 = bs_notimpl_bs_rr_8,
93 
94 	/* write (single) */
95 	.bs_w_1 = generic_bs_w_1,
96 	.bs_w_2 = generic_armv4_bs_w_2,
97 	.bs_w_4 = generic_bs_w_4,
98 	.bs_w_8 = bs_notimpl_bs_w_8,
99 
100 	/* write multiple */
101 	.bs_wm_1 = generic_bs_wm_1,
102 	.bs_wm_2 = generic_armv4_bs_wm_2,
103 	.bs_wm_4 = generic_bs_wm_4,
104 	.bs_wm_8 = bs_notimpl_bs_wm_8,
105 
106 	/* write region */
107 	.bs_wr_1 = generic_bs_wr_1,
108 	.bs_wr_2 = generic_armv4_bs_wr_2,
109 	.bs_wr_4 = generic_bs_wr_4,
110 	.bs_wr_8 = bs_notimpl_bs_wr_8,
111 
112 	/* set multiple */
113 	.bs_sm_1 = bs_notimpl_bs_sm_1,
114 	.bs_sm_2 = bs_notimpl_bs_sm_2,
115 	.bs_sm_4 = bs_notimpl_bs_sm_4,
116 	.bs_sm_8 = bs_notimpl_bs_sm_8,
117 
118 	/* set region */
119 	.bs_sr_1 = bs_notimpl_bs_sr_1,
120 	.bs_sr_2 = generic_armv4_bs_sr_2,
121 	.bs_sr_4 = generic_bs_sr_4,
122 	.bs_sr_8 = bs_notimpl_bs_sr_8,
123 
124 	/* copy */
125 	.bs_c_1 = bs_notimpl_bs_c_1,
126 	.bs_c_2 = generic_armv4_bs_c_2,
127 	.bs_c_4 = bs_notimpl_bs_c_4,
128 	.bs_c_8 = bs_notimpl_bs_c_8,
129 };
130 
131 /* Common routines */
132 
133 int
ixp12x0_bs_map(void * t,bus_addr_t bpa,bus_size_t size,int flags,bus_space_handle_t * bshp)134 ixp12x0_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
135 	       int flags, bus_space_handle_t *bshp)
136 {
137 	const struct pmap_devmap	*pd;
138 
139 	paddr_t		startpa;
140 	paddr_t		endpa;
141 	paddr_t		pa;
142 	paddr_t		offset;
143 	vaddr_t		va;
144 
145 	if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
146 		/* Device was statically mapped. */
147 		*bshp = pd->pd_va + (bpa - pd->pd_pa);
148 		return 0;
149 	}
150 
151 	endpa = round_page(bpa + size);
152 	offset = bpa & PAGE_MASK;
153 	startpa = trunc_page(bpa);
154 
155 	va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
156 	    UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
157 	if (va  == 0)
158 		return ENOMEM;
159 
160 	*bshp = va + offset;
161 
162 	const int pmapflags =
163 	    (flags & (BUS_SPACE_MAP_CACHEABLE|BUS_SPACE_MAP_PREFETCHABLE))
164 		? 0
165 		: PMAP_NOCACHE;
166 	for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
167 		pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, pmapflags);
168 	}
169 	pmap_update(pmap_kernel());
170 
171 	return 0;
172 }
173 
174 void
ixp12x0_bs_unmap(void * t,bus_space_handle_t bsh,bus_size_t size)175 ixp12x0_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
176 {
177 	vaddr_t	va;
178 	vaddr_t	endva;
179 
180 	if (pmap_devmap_find_va(bsh, size) != NULL) {
181 		/* Device was statically mapped; nothing to do. */
182 		return;
183 	}
184 
185 	endva = round_page(bsh + size);
186 	va = trunc_page(bsh);
187 
188 	pmap_kremove(va, endva - va);
189 	uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY);
190 }
191 
192 int
ixp12x0_bs_subregion(void * t,bus_space_handle_t bsh,bus_size_t offset,bus_size_t size,bus_space_handle_t * nbshp)193 ixp12x0_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
194 {
195 
196 	*nbshp = bsh + offset;
197 	return (0);
198 }
199 
200 void *
ixp12x0_bs_vaddr(void * t,bus_space_handle_t bsh)201 ixp12x0_bs_vaddr(void *t, bus_space_handle_t bsh)
202 {
203 	return ((void *)bsh);
204 }
205 
206 int
ixp12x0_bs_alloc(void * t,bus_addr_t rstart,bus_addr_t rend,bus_size_t size,bus_size_t alignment,bus_size_t boundary,int flags,bus_addr_t * bpap,bus_space_handle_t * bshp)207 ixp12x0_bs_alloc(void *t,
208 		 bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
209 		 bus_size_t alignment, bus_size_t boundary,
210 		 int flags, bus_addr_t *bpap,
211 		 bus_space_handle_t *bshp)
212 {
213 	panic("ixp12x0_bs_alloc(): not implemented\n");
214 }
215 
216 void
ixp12x0_bs_free(void * t,bus_space_handle_t bsh,bus_size_t size)217 ixp12x0_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
218 {
219 	panic("ixp12x0_bs_free(): not implemented\n");
220 }
221 
222 void
ixp12x0_bs_barrier(void * t,bus_space_handle_t bsh,bus_size_t offset,bus_size_t len,int flags)223 ixp12x0_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset, bus_size_t len, int flags)
224 {
225 /* NULL */
226 }
227 
228 /* End of ixp12x0_io.c */
229