xref: /netbsd-src/sys/arch/arm/imx/imxusb.c (revision 1b53f8867012b6c9584d633cbb812d3af7e001ea)
1 /*	$NetBSD: imxusb.c,v 1.19 2023/05/04 17:09:44 bouyer Exp $	*/
2 /*
3  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
4  * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
17  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
18  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
19  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.19 2023/05/04 17:09:44 bouyer Exp $");
29 
30 #include "locators.h"
31 #include "opt_imx.h"
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/conf.h>
36 #include <sys/kernel.h>
37 #include <sys/device.h>
38 #include <sys/intr.h>
39 #include <sys/bus.h>
40 
41 #include <dev/usb/usb.h>
42 #include <dev/usb/usbdi.h>
43 #include <dev/usb/usbdivar.h>
44 #include <dev/usb/usb_mem.h>
45 
46 #include <dev/usb/ehcireg.h>
47 #include <dev/usb/ehcivar.h>
48 
49 #include <arm/pic/picvar.h>	/* XXX: for intr_establish! */
50 
51 #include <arm/imx/imxusbreg.h>
52 #include <arm/imx/imxusbvar.h>
53 
54 #include <dev/usb/ulpireg.h>	/* for test */
55 
56 static int	imxehci_match(device_t, cfdata_t, void *);
57 static void	imxehci_attach(device_t, device_t, void *);
58 
59 uint8_t imxusb_ulpi_read(struct imxehci_softc *sc, int addr);
60 void imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data);
61 static void ulpi_reset(struct imxehci_softc *sc);
62 
63 static void imxehci_select_interface(struct imxehci_softc *, enum imx_usb_if);
64 static void imxehci_init(struct ehci_softc *);
65 
66 /* attach structures */
67 CFATTACH_DECL_NEW(imxehci, sizeof(struct imxehci_softc),
68     imxehci_match, imxehci_attach, NULL, NULL);
69 
70 static int
imxehci_match(device_t parent,cfdata_t cf,void * aux)71 imxehci_match(device_t parent, cfdata_t cf, void *aux)
72 {
73 	struct imxusbc_attach_args *aa = aux;
74 
75 	if (aa->aa_unit < 0 || 3 < aa->aa_unit)
76 		return 0;
77 
78 	return 1;
79 }
80 
81 static void
imxehci_attach(device_t parent,device_t self,void * aux)82 imxehci_attach(device_t parent, device_t self, void *aux)
83 {
84 	struct imxusbc_attach_args *aa = aux;
85 	struct imxusbc_softc *usbc = device_private(parent);
86 	struct imxehci_softc *sc = device_private(self);
87 	ehci_softc_t *hsc = &sc->sc_hsc;
88 	bus_space_tag_t iot;
89 	uint16_t hcirev;
90 	uint32_t id, hwhost, hwdevice;
91 	const char *comma;
92 
93 	iot = aa->aa_iot;
94 
95 	sc->sc_dev = self;
96 	sc->sc_unit = aa->aa_unit;
97 	sc->sc_usbc = usbc;
98 	sc->sc_iot = iot;
99 
100 	hsc->sc_dev = self;
101 	hsc->iot = iot;
102 	hsc->sc_bus.ub_hcpriv = sc;
103 	hsc->sc_bus.ub_dmatag = aa->aa_dmat;
104 	hsc->sc_flags |= EHCIF_ETTF;
105 	hsc->sc_vendor_init = imxehci_init;
106 
107 	aprint_naive("\n");
108 	aprint_normal(": i.MX USB Controller\n");
109 
110 	if (usbc->sc_ehci_size == 0)
111 		usbc->sc_ehci_size = IMXUSB_EHCI_SIZE;	/* use default */
112 
113 	/* per unit registers */
114 	if (bus_space_subregion(iot, aa->aa_ioh,
115 		sc->sc_unit * usbc->sc_ehci_offset, usbc->sc_ehci_size,
116 		&sc->sc_ioh) ||
117 	    bus_space_subregion(iot, aa->aa_ioh,
118 		sc->sc_unit * usbc->sc_ehci_offset + IMXUSB_EHCIREGS,
119 		usbc->sc_ehci_size - IMXUSB_EHCIREGS,
120 		&hsc->ioh)) {
121 
122 		aprint_error_dev(self, "can't subregion\n");
123 		return;
124 	}
125 
126 	id = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_ID);
127 	hcirev = bus_space_read_2(iot, hsc->ioh, EHCI_HCIVERSION);
128 
129 	aprint_normal_dev(self,
130 	    "id=%d revision=%d HCI revision=0x%x\n",
131 	    (int)__SHIFTOUT(id, IMXUSB_ID_ID),
132 	    (int)__SHIFTOUT(id, IMXUSB_ID_REVISION),
133 	    hcirev);
134 
135 	hwhost = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWHOST);
136 	hwdevice = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWDEVICE);
137 
138 	aprint_normal_dev(self, "");
139 
140 	comma = "";
141 	if (hwhost & HWHOST_HC) {
142 		int n_ports = 1 + __SHIFTOUT(hwhost, HWHOST_NPORT);
143 		aprint_normal("%d host port%s",
144 		    n_ports, n_ports > 1 ? "s" : "");
145 		comma = ", ";
146 	}
147 
148 	if (hwdevice & HWDEVICE_DC) {
149 		int n_endpoints = __SHIFTOUT(hwdevice, HWDEVICE_DEVEP);
150 		aprint_normal("%sdevice capable, %d endpoint%s",
151 		    comma,
152 		    n_endpoints, n_endpoints > 1 ? "s" : "");
153 	}
154 	aprint_normal("\n");
155 
156 	hsc->sc_offs = bus_space_read_1(iot, hsc->ioh,
157 	    EHCI_CAPLENGTH);
158 
159 	/* Platform dependent setup */
160 	if (usbc->sc_init_md_hook)
161 		usbc->sc_init_md_hook(sc, usbc->sc_md_hook_data);
162 
163 	imxehci_reset(sc);
164 	imxehci_select_interface(sc, sc->sc_iftype);
165 
166 	if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
167 		bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, 0);
168 
169 		aprint_normal_dev(hsc->sc_dev,
170 		    "ULPI phy VID 0x%04x PID 0x%04x\n",
171 		    (imxusb_ulpi_read(sc, ULPI_VENDOR_ID_LOW) |
172 			imxusb_ulpi_read(sc, ULPI_VENDOR_ID_HIGH) << 8),
173 		    (imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_LOW) |
174 			imxusb_ulpi_read(sc, ULPI_PRODUCT_ID_HIGH) << 8));
175 
176 		ulpi_reset(sc);
177 
178 	}
179 
180 	if (usbc->sc_setup_md_hook)
181 		usbc->sc_setup_md_hook(sc, IMXUSB_HOST, usbc->sc_md_hook_data);
182 
183 	if (sc->sc_iftype == IMXUSBC_IF_ULPI) {
184 #if 0
185 		if(hsc->sc_bus.ub_revision == USBREV_2_0)
186 			ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR, (1 << 0));
187 		else
188 			ulpi_write(hsc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET, (1 << 2));
189 #endif
190 
191 		imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_CLEAR,
192 		    OTG_CONTROL_IDPULLUP);
193 
194 		imxusb_ulpi_write(sc, ULPI_OTG_CONTROL + ULPI_REG_SET,
195 		    OTG_CONTROL_USEEXTVBUSIND |
196 		    OTG_CONTROL_DRVVBUSEXT |
197 		    OTG_CONTROL_DRVVBUS |
198 		    OTG_CONTROL_CHRGVBUS);
199 	}
200 
201 	/* Disable interrupts, so we don't get any spurious ones. */
202 	EOWRITE4(hsc, EHCI_USBINTR, 0);
203 
204 	if (usbc->sc_intr_establish_md_hook)
205 		sc->sc_ih = usbc->sc_intr_establish_md_hook(sc,
206 		    usbc->sc_md_hook_data);
207 	else if (aa->aa_irq > 0)
208 		sc->sc_ih = intr_establish(aa->aa_irq, IPL_USB, IST_LEVEL, ehci_intr, hsc);
209 	KASSERT(sc->sc_ih != NULL);
210 
211 	int err = ehci_init(hsc);
212 	if (err) {
213 		aprint_error_dev(self, "init failed, error=%d\n", err);
214 		return;
215 	}
216 
217 	/* Attach usb device. */
218 	hsc->sc_child = config_found(self, &hsc->sc_bus, usbctlprint,
219 	    CFARGS_NONE);
220 }
221 
222 static void
imxehci_select_interface(struct imxehci_softc * sc,enum imx_usb_if interface)223 imxehci_select_interface(struct imxehci_softc *sc, enum imx_usb_if interface)
224 {
225 	uint32_t reg;
226 	struct ehci_softc *hsc = &sc->sc_hsc;
227 
228 	reg = EOREAD4(hsc, EHCI_PORTSC(1));
229 	reg &= ~(PORTSC_PTS | PORTSC_PTW | PORTSC_PTS2);
230 	switch (interface) {
231 	case IMXUSBC_IF_UTMI_WIDE:
232 		reg |= PORTSC_PTW_16;
233 	case IMXUSBC_IF_UTMI:
234 		reg |= PORTSC_PTS_UTMI;
235 		break;
236 	case IMXUSBC_IF_PHILIPS:
237 		reg |= PORTSC_PTS_PHILIPS;
238 		break;
239 	case IMXUSBC_IF_ULPI:
240 		reg |= PORTSC_PTS_ULPI;
241 		break;
242 	case IMXUSBC_IF_SERIAL:
243 		reg |= PORTSC_PTS_SERIAL;
244 		break;
245 	case IMXUSBC_IF_HSIC:
246 		reg |= PORTSC_PTS2;
247 		break;
248 	}
249 	EOWRITE4(hsc, EHCI_PORTSC(1), reg);
250 }
251 
252 static uint32_t
ulpi_wakeup(struct imxehci_softc * sc,int tout)253 ulpi_wakeup(struct imxehci_softc *sc, int tout)
254 {
255 	struct ehci_softc *hsc = &sc->sc_hsc;
256 	uint32_t ulpi_view;
257 
258 	ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
259 
260 	if (!(ulpi_view & ULPI_SS)) {
261 		bus_space_write_4(sc->sc_iot, sc->sc_ioh,
262 		    IMXUSB_ULPIVIEW, ULPI_WU);
263 		while (tout-- > 0) {
264 			ulpi_view = bus_space_read_4(sc->sc_iot,
265 			    sc->sc_ioh, IMXUSB_ULPIVIEW);
266 			if (!(ulpi_view & ULPI_WU))
267 				break;
268 			delay(1);
269 		};
270 	}
271 
272 	if (tout == 0)
273 		aprint_error_dev(hsc->sc_dev, "%s: timeout\n", __func__);
274 
275 	return ulpi_view;
276 }
277 
278 static uint32_t
ulpi_wait(struct imxehci_softc * sc,int tout)279 ulpi_wait(struct imxehci_softc *sc, int tout)
280 {
281 	struct ehci_softc *hsc = &sc->sc_hsc;
282 	uint32_t ulpi_view;
283 
284 	ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW);
285 
286 	while (tout-- > 0) {
287 		ulpi_view = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
288 		    IMXUSB_ULPIVIEW);
289 		if (!(ulpi_view & ULPI_RUN))
290 			break;
291 		delay(1);
292 	}
293 
294 	if (tout == 0)
295 		aprint_error_dev(hsc->sc_dev, "%s: timeout\n", __func__);
296 
297 	return ulpi_view;
298 }
299 
300 #define	TIMEOUT	100000
301 
302 uint8_t
imxusb_ulpi_read(struct imxehci_softc * sc,int addr)303 imxusb_ulpi_read(struct imxehci_softc *sc, int addr)
304 {
305 	uint32_t reg;
306 
307 	ulpi_wakeup(sc, TIMEOUT);
308 
309 	reg = ULPI_RUN | __SHIFTIN(addr, ULPI_ADDR);
310 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg);
311 
312 	reg = ulpi_wait(sc, TIMEOUT);
313 
314 	return __SHIFTOUT(reg, ULPI_DATRD);
315 }
316 
317 void
imxusb_ulpi_write(struct imxehci_softc * sc,int addr,uint8_t data)318 imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data)
319 {
320 	uint32_t reg;
321 
322 	ulpi_wakeup(sc, TIMEOUT);
323 
324 	reg = ULPI_RUN | ULPI_RW | __SHIFTIN(addr, ULPI_ADDR) | __SHIFTIN(data, ULPI_DATWR);
325 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_ULPIVIEW, reg);
326 
327 	ulpi_wait(sc, TIMEOUT);
328 
329 	return;
330 }
331 
332 static void
ulpi_reset(struct imxehci_softc * sc)333 ulpi_reset(struct imxehci_softc *sc)
334 {
335 	struct ehci_softc *hsc = &sc->sc_hsc;
336 	uint8_t data;
337 	int timo = 1000 * 1000;	/* XXXX: 1sec */
338 
339 	imxusb_ulpi_write(sc, ULPI_FUNCTION_CONTROL + ULPI_REG_SET,
340 	    FUNCTION_CONTROL_RESET /*0x20*/);
341 	do {
342 		data = imxusb_ulpi_read(sc, ULPI_FUNCTION_CONTROL);
343 		if (!(data & FUNCTION_CONTROL_RESET))
344 			break;
345 		delay(100);
346 		timo -= 100;
347 	} while (timo > 0);
348 
349 	if (timo <= 0) {
350 		aprint_error_dev(hsc->sc_dev, "%s: reset failed!!\n",
351 		    __func__);
352 		return;
353 	}
354 
355 	return;
356 }
357 
358 void
imxehci_reset(struct imxehci_softc * sc)359 imxehci_reset(struct imxehci_softc *sc)
360 {
361 	uint32_t reg;
362 	struct ehci_softc *hsc = &sc->sc_hsc;
363 	int tout;
364 #define	RESET_TIMEOUT 100
365 
366 	reg = EOREAD4(hsc, EHCI_USBCMD);
367 	reg &= ~EHCI_CMD_RS;
368 	EOWRITE4(hsc, EHCI_USBCMD, reg);
369 
370 	for (tout = RESET_TIMEOUT; tout > 0; tout--) {
371 		reg = EOREAD4(hsc, EHCI_USBCMD);
372 		if ((reg & EHCI_CMD_RS) == 0)
373 			break;
374 		usb_delay_ms(&hsc->sc_bus, 1);
375 	}
376 
377 	EOWRITE4(hsc, EHCI_USBCMD, reg | EHCI_CMD_HCRESET);
378 
379 	for (tout = RESET_TIMEOUT; tout > 0; tout--) {
380 		reg = EOREAD4(hsc, EHCI_USBCMD);
381 		if ((reg &  EHCI_CMD_HCRESET) == 0)
382 			break;
383 		usb_delay_ms(&hsc->sc_bus, 1);
384 	}
385 
386 	if (tout == 0)
387 		aprint_error_dev(hsc->sc_dev, "reset timeout (%x)\n", reg);
388 
389 	usb_delay_ms(&hsc->sc_bus, 100);
390 }
391 
392 static void
imxehci_init(struct ehci_softc * hsc)393 imxehci_init(struct ehci_softc *hsc)
394 {
395 	struct imxehci_softc *sc = device_private(hsc->sc_dev);
396 	uint32_t reg;
397 
398 	reg = EOREAD4(hsc, EHCI_PORTSC(1));
399 	reg &= ~(EHCI_PS_CSC | EHCI_PS_PEC | EHCI_PS_OCC);
400 	reg |= EHCI_PS_PP | EHCI_PS_PE;
401 	EOWRITE4(hsc, EHCI_PORTSC(1), reg);
402 
403 	reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC);
404 	reg |= OTGSC_IDPU;
405 	/* disable IDIE not to conflict with SSP1_DETECT. */
406 	//reg |= OTGSC_DPIE | OTGSC_IDIE;
407 	reg |= OTGSC_DPIE;
408 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC, reg);
409 
410 	reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_USBMODE);
411 	reg &= ~USBMODE_CM;
412 	reg |= USBMODE_CM_HOST;
413 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_USBMODE, reg);
414 }
415