1 /* $NetBSD: imx51_ipuv3var.h,v 1.3 2015/12/21 04:26:28 hkenken Exp $ */ 2 3 /* 4 * Copyright (c) 2009, 2011, 2012 Genetec Corporation. All rights reserved. 5 * Written by Hashimoto Kenichi for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #ifndef _ARM_IMX_IMX51_IPUV3_H 30 #define _ARM_IMX_IMX51_IPUV3_H 31 32 #include <dev/wscons/wsconsio.h> 33 #include <dev/wscons/wsdisplayvar.h> 34 35 #include <sys/bus.h> 36 37 /* IPUV3 Contoroller */ 38 struct imx51_ipuv3_screen { 39 LIST_ENTRY(imx51_ipuv3_screen) link; 40 41 /* Frame buffer */ 42 bus_dmamap_t dma; 43 bus_dma_segment_t segs[1]; 44 int nsegs; 45 size_t buf_size; 46 size_t map_size; 47 void *buf_va; 48 int depth; 49 int stride; 50 51 /* DMA frame descriptor */ 52 struct ipuv3_dma_descriptor *dma_desc; 53 paddr_t dma_desc_pa; 54 }; 55 56 struct lcd_panel_geometry { 57 int depth; 58 59 short panel_width; 60 short panel_height; 61 62 uint32_t pixel_clk; 63 64 short hsync_width; 65 short left; 66 short right; 67 68 short vsync_width; 69 short upper; 70 short lower; 71 72 short panel_info; 73 #define IPUV3PANEL_SHARP (1<<0) /* sharp panel */ 74 uint32_t panel_sig_pol; 75 }; 76 77 struct imx51_ipuv3_softc { 78 device_t dev; 79 80 /* control register */ 81 bus_space_tag_t iot; 82 bus_space_handle_t cm_ioh; /* CM */ 83 bus_space_handle_t dmfc_ioh; /* DMFC */ 84 bus_space_handle_t di0_ioh; /* DI 0 */ 85 bus_space_handle_t dp_ioh; /* DP */ 86 bus_space_handle_t dc_ioh; /* DC */ 87 bus_space_handle_t idmac_ioh; /* IDMAC */ 88 bus_space_handle_t cpmem_ioh; /* CPMEM */ 89 bus_space_handle_t dctmpl_ioh; /* DCTMPL */ 90 bus_dma_tag_t dma_tag; 91 92 uint32_t flags; 93 #define FLAG_NOUSE_ACBIAS (1U<<0) 94 95 const struct lcd_panel_geometry *geometry; 96 97 int n_screens; 98 LIST_HEAD(, imx51_ipuv3_screen) screens; 99 struct imx51_ipuv3_screen *active; 100 void *ih; /* interrupt handler */ 101 102 device_t fbdev; 103 }; 104 105 struct imx51_ipuv3_softc; 106 107 void imx51_ipuv3_attach_sub(struct imx51_ipuv3_softc *, 108 struct axi_attach_args *, const struct lcd_panel_geometry *); 109 int imx51_ipuv3_cnattach(bool); 110 void imx51_ipuv3_start_dma(struct imx51_ipuv3_softc *, 111 struct imx51_ipuv3_screen *); 112 113 void imx51_ipuv3_geometry(struct imx51_ipuv3_softc *, 114 const struct lcd_panel_geometry *); 115 int imx51_ipuv3_new_screen(struct imx51_ipuv3_softc *, 116 struct imx51_ipuv3_screen **); 117 118 int imx51_ipuv3_show_screen(void *, void *, int, void (*)(void *, int, int), 119 void *); 120 121 #endif /* _ARM_IMX_IMX51_IPUV3_H */ 122