1 /* $NetBSD: footbridge_pci.c,v 1.34 2022/09/27 06:36:41 skrll Exp $ */
2
3 /*
4 * Copyright (c) 1997,1998 Mark Brinicombe.
5 * Copyright (c) 1997,1998 Causality Limited
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Mark Brinicombe
19 * for the NetBSD Project.
20 * 4. The name of the company nor the name of the author may be used to
21 * endorse or promote products derived from this software without specific
22 * prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 */
36
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: footbridge_pci.c,v 1.34 2022/09/27 06:36:41 skrll Exp $");
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/conf.h>
43 #include <sys/device.h>
44
45 #define _ARM32_BUS_DMA_PRIVATE
46 #include <sys/bus.h>
47 #include <machine/intr.h>
48
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
51
52 #include <arm/footbridge/dc21285reg.h>
53 #include <arm/footbridge/dc21285mem.h>
54
55 #include "isa.h"
56 #if NISA > 0
57 #include <dev/isa/isavar.h>
58 #endif
59
60 void footbridge_pci_attach_hook(device_t, device_t,
61 struct pcibus_attach_args *);
62 int footbridge_pci_bus_maxdevs(void *, int);
63 pcitag_t footbridge_pci_make_tag(void *, int, int, int);
64 void footbridge_pci_decompose_tag(void *, pcitag_t, int *,
65 int *, int *);
66 pcireg_t footbridge_pci_conf_read(void *, pcitag_t, int);
67 void footbridge_pci_conf_write(void *, pcitag_t, int,
68 pcireg_t);
69 int footbridge_pci_intr_map(const struct pci_attach_args *,
70 pci_intr_handle_t *);
71 const char *footbridge_pci_intr_string(void *, pci_intr_handle_t,
72 char *, size_t);
73 void *footbridge_pci_intr_establish(void *, pci_intr_handle_t,
74 int, int (*)(void *), void *, const char *);
75 void footbridge_pci_intr_disestablish(void *, void *);
76 const struct evcnt *footbridge_pci_intr_evcnt(void *, pci_intr_handle_t);
77
78 struct arm32_pci_chipset footbridge_pci_chipset = {
79 #ifdef netwinder
80 .pc_attach_hook = netwinder_pci_attach_hook,
81 #else
82 .pc_attach_hook = footbridge_pci_attach_hook,
83 #endif
84 .pc_bus_maxdevs = footbridge_pci_bus_maxdevs,
85 .pc_make_tag = footbridge_pci_make_tag,
86 .pc_decompose_tag = footbridge_pci_decompose_tag,
87 .pc_conf_read = footbridge_pci_conf_read,
88 .pc_conf_write = footbridge_pci_conf_write,
89 .pc_intr_map = footbridge_pci_intr_map,
90 .pc_intr_string = footbridge_pci_intr_string,
91 .pc_intr_evcnt = footbridge_pci_intr_evcnt,
92 .pc_intr_establish = footbridge_pci_intr_establish,
93 .pc_intr_disestablish = footbridge_pci_intr_disestablish
94 };
95
96 struct arm32_dma_range footbridge_dma_ranges[1];
97
98 /*
99 * PCI doesn't have any special needs; just use the generic versions
100 * of these functions.
101 */
102 struct arm32_bus_dma_tag footbridge_pci_bus_dma_tag = {
103 ._ranges = footbridge_dma_ranges,
104 ._nranges = 1,
105 _BUS_DMAMAP_FUNCS,
106 _BUS_DMAMEM_FUNCS,
107 _BUS_DMATAG_FUNCS,
108 };
109
110 /*
111 * Currently we only support 12 devices as we select directly in the
112 * type 0 config cycle
113 * (See conf_{read,write} for more detail
114 */
115 #define MAX_PCI_DEVICES 21
116
117 /*static int
118 pci_intr(void *arg)
119 {
120 printf("pci int %x\n", (int)arg);
121 return(0);
122 }*/
123
124
125 void
footbridge_pci_attach_hook(device_t parent,device_t self,struct pcibus_attach_args * pba)126 footbridge_pci_attach_hook(device_t parent, device_t self, struct pcibus_attach_args *pba)
127 {
128 #ifdef PCI_DEBUG
129 printf("footbridge_pci_attach_hook()\n");
130 #endif
131
132 /* intr_claim(18, IPL_NONE, "pci int 0", pci_intr, (void *)0x10000);
133 intr_claim(8, IPL_NONE, "pci int 1", pci_intr, (void *)0x10001);
134 intr_claim(9, IPL_NONE, "pci int 2", pci_intr, (void *)0x10002);
135 intr_claim(11, IPL_NONE, "pci int 3", pci_intr, (void *)0x10003);*/
136 }
137
138 int
footbridge_pci_bus_maxdevs(void * pcv,int busno)139 footbridge_pci_bus_maxdevs(void *pcv, int busno)
140 {
141 #ifdef PCI_DEBUG
142 printf("footbridge_pci_bus_maxdevs(pcv=%p, busno=%d)\n", pcv, busno);
143 #endif
144 return(MAX_PCI_DEVICES);
145 }
146
147 pcitag_t
footbridge_pci_make_tag(void * pcv,int bus,int device,int function)148 footbridge_pci_make_tag(void *pcv, int bus, int device, int function)
149 {
150 #ifdef PCI_DEBUG
151 printf("footbridge_pci_make_tag(pcv=%p, bus=%d, device=%d, function=%d)\n",
152 pcv, bus, device, function);
153 #endif
154 return ((bus << 16) | (device << 11) | (function << 8));
155 }
156
157 void
footbridge_pci_decompose_tag(void * pcv,pcitag_t tag,int * busp,int * devicep,int * functionp)158 footbridge_pci_decompose_tag(void *pcv, pcitag_t tag, int *busp, int *devicep, int *functionp)
159 {
160 #ifdef PCI_DEBUG
161 printf("footbridge_pci_decompose_tag(pcv=%p, tag=0x%08x, bp=%p, dp=%p, fp=%p)\n",
162 pcv, (uint32_t)tag, busp, devicep, functionp);
163 #endif
164
165 if (busp != NULL)
166 *busp = (tag >> 16) & 0xff;
167 if (devicep != NULL)
168 *devicep = (tag >> 11) & 0x1f;
169 if (functionp != NULL)
170 *functionp = (tag >> 8) & 0x7;
171 }
172
173 pcireg_t
footbridge_pci_conf_read(void * pcv,pcitag_t tag,int reg)174 footbridge_pci_conf_read(void *pcv, pcitag_t tag, int reg)
175 {
176 int bus, device, function;
177 u_int address;
178 pcireg_t data;
179
180 if ((unsigned int)reg >= PCI_CONF_SIZE)
181 return ((pcireg_t) -1);
182
183 footbridge_pci_decompose_tag(pcv, tag, &bus, &device, &function);
184 if (bus == 0)
185 /* Limited to 12 devices or we exceed type 0 config space */
186 address = DC21285_PCI_TYPE_0_CONFIG_VBASE | (3 << 22) | (device << 11);
187 else
188 address = DC21285_PCI_TYPE_1_CONFIG_VBASE | (device << 11) |
189 (bus << 16);
190
191 address |= (function << 8) | reg;
192
193 data = *((unsigned int *)address);
194 #ifdef PCI_DEBUG
195 printf("footbridge_pci_conf_read(pcv=%p tag=0x%08x reg=0x%02x)=0x%08x\n",
196 pcv, (uint32_t)tag, reg, data);
197 #endif
198 return(data);
199 }
200
201 void
footbridge_pci_conf_write(void * pcv,pcitag_t tag,int reg,pcireg_t data)202 footbridge_pci_conf_write(void *pcv, pcitag_t tag, int reg, pcireg_t data)
203 {
204 int bus, device, function;
205 u_int address;
206
207 if ((unsigned int)reg >= PCI_CONF_SIZE)
208 return;
209
210 footbridge_pci_decompose_tag(pcv, tag, &bus, &device, &function);
211 if (bus == 0)
212 address = DC21285_PCI_TYPE_0_CONFIG_VBASE | (3 << 22) | (device << 11);
213 else
214 address = DC21285_PCI_TYPE_1_CONFIG_VBASE | (device << 11) |
215 (bus << 16);
216
217 address |= (function << 8) | reg;
218
219 #ifdef PCI_DEBUG
220 printf("footbridge_pci_conf_write(pcv=%p tag=0x%08x reg=0x%02x, 0x%08x)\n",
221 pcv, (uint32_t)tag, reg, data);
222 #endif
223
224 *((unsigned int *)address) = data;
225 }
226
227 int
footbridge_pci_intr_map(const struct pci_attach_args * pa,pci_intr_handle_t * ihp)228 footbridge_pci_intr_map(const struct pci_attach_args *pa,
229 pci_intr_handle_t *ihp)
230 {
231 int pin = pa->pa_intrpin, line = pa->pa_intrline;
232 int intr = -1;
233
234 #ifdef PCI_DEBUG
235 void *pcv = pa->pa_pc;
236 pcitag_t intrtag = pa->pa_intrtag;
237 int bus, device, function;
238
239 footbridge_pci_decompose_tag(pcv, intrtag, &bus, &device, &function);
240 printf("footbridge_pci_intr_map: pcv=%p, tag=%08x pin=%d line=%d dev=%d\n",
241 pcv, (uint32_t)intrtag, pin, line, device);
242 #endif
243
244 /*
245 * Only the line is used to map the interrupt.
246 * The firmware is expected to setup up the interrupt
247 * line as seen from the CPU
248 * This means the firmware deals with the interrupt rotation
249 * between slots etc.
250 *
251 * Perhaps the firmware should also to the final mapping
252 * to a 21285 interrupt bit so the code below would be
253 * completely MI.
254 */
255
256 switch (line) {
257 case PCI_INTERRUPT_PIN_NONE:
258 case 0xff:
259 /* No IRQ */
260 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
261 *ihp = -1;
262 return(1);
263 break;
264 #ifdef cats
265 /* This is machine dependent and needs to be moved */
266 case PCI_INTERRUPT_PIN_A:
267 intr = IRQ_PCI;
268 break;
269 case PCI_INTERRUPT_PIN_B:
270 intr = IRQ_IN_L0;
271 break;
272 case PCI_INTERRUPT_PIN_C:
273 intr = IRQ_IN_L1;
274 break;
275 case PCI_INTERRUPT_PIN_D:
276 intr = IRQ_IN_L3;
277 break;
278 #endif
279 default:
280 /*
281 * Experimental firmware feature ...
282 *
283 * If the interrupt line is in the range 0x80 to 0x8F
284 * then the lower 4 bits indicate the ISA interrupt
285 * bit that should be used.
286 * If the interrupt line is in the range 0x40 to 0x5F
287 * then the lower 5 bits indicate the actual DC21285
288 * interrupt bit that should be used.
289 */
290
291 if (line >= 0x40 && line <= 0x5f)
292 intr = line & 0x1f;
293 else if (line >= 0x80 && line <= 0x8f)
294 intr = line;
295 else {
296 printf("footbridge_pci_intr_map: out of range interrupt"
297 "pin %d line %d (%#x)\n", pin, line, line);
298 *ihp = -1;
299 return(1);
300 }
301 break;
302 }
303
304 #ifdef PCI_DEBUG
305 printf("pin %d, line %d mapped to int %d\n", pin, line, intr);
306 #endif
307
308 *ihp = intr;
309 return(0);
310 }
311
312 const char *
footbridge_pci_intr_string(void * pcv,pci_intr_handle_t ih,char * buf,size_t len)313 footbridge_pci_intr_string(void *pcv, pci_intr_handle_t ih, char *buf, size_t len)
314 {
315 #ifdef PCI_DEBUG
316 printf("footbridge_pci_intr_string(pcv=%p, ih=0x%" PRIx64 ")\n", pcv, ih);
317 #endif
318 if (ih == 0)
319 panic("footbridge_pci_intr_string: bogus handle 0x%" PRIx64, ih);
320
321 #if NISA > 0
322 if (ih >= 0x80 && ih <= 0x8f) {
323 snprintf(buf, len, "isairq %" PRIu64, (ih & 0x0f));
324 return buf;
325 }
326 #endif
327 snprintf(buf, len, "irq %" PRIu64, ih);
328 return buf;
329 }
330
331 void *
footbridge_pci_intr_establish(void * pcv,pci_intr_handle_t ih,int level,int (* func)(void *),void * arg,const char * xname)332 footbridge_pci_intr_establish(
333 void *pcv,
334 pci_intr_handle_t ih,
335 int level,
336 int (*func)(void *),
337 void *arg, const char *xname)
338 {
339 void *intr;
340 char buf[PCI_INTRSTR_LEN];
341 const char *intrstr;
342
343 #ifdef PCI_DEBUG
344 printf("footbridge_pci_intr_establish(pcv=%p, ih=0x%" PRIx64 ", level=%d, func=%p, arg=%p, xname=%s)\n",
345 pcv, ih, level, func, arg, xname);
346 #endif
347
348 /* Copy the interrupt string to a private buffer */
349 intrstr = footbridge_pci_intr_string(pcv, ih, buf, sizeof(buf));
350 #if NISA > 0
351 /*
352 * XXX the IDE driver will attach the interrupts in compat mode and
353 * thus we need to fail this here.
354 * This assumes that the interrupts are 14 and 15 which they are for
355 * IDE compat mode.
356 * Really the firmware should make this clear in the interrupt reg.
357 */
358 if (ih >= 0x80 && ih <= 0x8d) {
359 intr = isa_intr_establish(NULL, (ih & 0x0f), IST_EDGE,
360 level, func, arg);
361 } else
362 #endif
363 intr = footbridge_intr_claim(ih, level, intrstr, func, arg);
364
365 return(intr);
366 }
367
368 void
footbridge_pci_intr_disestablish(void * pcv,void * cookie)369 footbridge_pci_intr_disestablish(void *pcv, void *cookie)
370 {
371 #ifdef PCI_DEBUG
372 printf("footbridge_pci_intr_disestablish(pcv=%p, cookie=%p)\n",
373 pcv, cookie);
374 #endif
375 /* XXXX Need to free the string */
376 footbridge_intr_disestablish(cookie);
377 }
378