1 /* $NetBSD: plcom_fdt.c,v 1.6 2023/01/24 06:56:40 mlelstv Exp $ */
2
3 /*-
4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: plcom_fdt.c,v 1.6 2023/01/24 06:56:40 mlelstv Exp $");
31
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37
38 #include <dev/fdt/fdtvar.h>
39
40 #include <evbarm/dev/plcomreg.h>
41 #include <evbarm/dev/plcomvar.h>
42
43 static int plcom_fdt_match(device_t, cfdata_t, void *);
44 static void plcom_fdt_attach(device_t, device_t, void *);
45
46 static const struct device_compatible_entry compat_data[] = {
47 { .compat = "arm,pl011", .value = PLCOM_TYPE_PL011 },
48 { .compat = "arm,sbsa-uart", .value = PLCOM_TYPE_GENERIC_UART },
49 DEVICE_COMPAT_EOL
50 };
51
52 CFATTACH_DECL_NEW(plcom_fdt, sizeof(struct plcom_softc),
53 plcom_fdt_match, plcom_fdt_attach, NULL, NULL);
54
55 static int
plcom_fdt_match(device_t parent,cfdata_t cf,void * aux)56 plcom_fdt_match(device_t parent, cfdata_t cf, void *aux)
57 {
58 struct fdt_attach_args * const faa = aux;
59
60 return of_compatible_match(faa->faa_phandle, compat_data);
61 }
62
63 static void
plcom_fdt_attach(device_t parent,device_t self,void * aux)64 plcom_fdt_attach(device_t parent, device_t self, void *aux)
65 {
66 struct plcom_softc * const sc = device_private(self);
67 struct fdt_attach_args * const faa = aux;
68 const int phandle = faa->faa_phandle;
69 char intrstr[128];
70 struct clk *clk;
71 bus_addr_t addr;
72 bus_size_t size;
73 void *ih;
74 const u_int *data;
75 int len;
76
77 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
78 aprint_error(": missing 'reg' property\n");
79 return;
80 }
81
82 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
83 aprint_error(": failed to decode interrupt\n");
84 return;
85 }
86
87 sc->sc_dev = self;
88
89 /* Enable clocks */
90 for (int i = 0; (clk = fdtbus_clock_get_index(phandle, i)); i++) {
91 if (clk_enable(clk) != 0) {
92 aprint_error(": failed to enable clock #%d\n", i);
93 return;
94 }
95 /* First clock is UARTCLK */
96 if (i == 0)
97 sc->sc_frequency = clk_get_rate(clk);
98 }
99
100 sc->sc_hwflags = 0;
101 sc->sc_swflags = 0;
102
103 if ((data = fdtbus_get_prop(phandle, "arm,primecell-periphid", &len)) != NULL)
104 sc->sc_pi.pi_periphid = be32toh(data[0]);
105
106 sc->sc_pi.pi_type = of_compatible_lookup(faa->faa_phandle, compat_data)->value;
107 sc->sc_pi.pi_flags = PLC_FLAG_32BIT_ACCESS;
108 sc->sc_pi.pi_iot = faa->faa_bst;
109 sc->sc_pi.pi_iobase = addr;
110 if (bus_space_map(faa->faa_bst, addr, size, 0, &sc->sc_pi.pi_ioh)) {
111 aprint_error(": couldn't map device\n");
112 return;
113 }
114
115 aprint_naive("\n");
116 aprint_normal(": ARM PL011 UART\n");
117
118 plcom_attach_subr(sc);
119
120 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
121
122 ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SERIAL, FDT_INTR_MPSAFE,
123 plcomintr, sc, device_xname(self));
124 if (ih == NULL) {
125 aprint_error_dev(self, "couldn't install interrupt handler\n");
126 return;
127 }
128 }
129
130 static int
plcom_fdt_console_match(int phandle)131 plcom_fdt_console_match(int phandle)
132 {
133 return of_compatible_match(phandle, compat_data);
134 }
135
136 static void
plcom_fdt_console_consinit(struct fdt_attach_args * faa,u_int uart_freq)137 plcom_fdt_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
138 {
139 static struct plcom_instance pi;
140 bus_addr_t addr;
141 bus_size_t size;
142 tcflag_t flags;
143 int speed;
144
145 if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0)
146 return;
147
148 pi.pi_type = PLCOM_TYPE_PL011;
149 pi.pi_flags = PLC_FLAG_32BIT_ACCESS;
150 pi.pi_iot = faa->faa_bst;
151 pi.pi_iobase = addr;
152 pi.pi_size = size;
153
154 speed = fdtbus_get_stdout_speed();
155 if (speed < 0)
156 speed = 115200;
157 flags = fdtbus_get_stdout_flags();
158
159 plcomcnattach(&pi, speed, uart_freq, flags, -1);
160 }
161
162 static const struct fdt_console plcom_fdt_console = {
163 .match = plcom_fdt_console_match,
164 .consinit = plcom_fdt_console_consinit,
165 };
166
167 FDT_CONSOLE(plcom_fdt, &plcom_fdt_console);
168