1 /* $NetBSD: pcihost_fdtvar.h,v 1.5 2022/09/06 11:55:07 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 Jared D. McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* Physical address format bit definitions */ 30 #define PHYS_HI_RELO __BIT(31) 31 #define PHYS_HI_PREFETCH __BIT(30) 32 #define PHYS_HI_ALIASED __BIT(29) 33 #define PHYS_HI_SPACE __BITS(25,24) 34 #define PHYS_HI_SPACE_CFG 0 35 #define PHYS_HI_SPACE_IO 1 36 #define PHYS_HI_SPACE_MEM32 2 37 #define PHYS_HI_SPACE_MEM64 3 38 #define PHYS_HI_BUS __BITS(23,16) 39 #define PHYS_HI_DEVICE __BITS(15,11) 40 #define PHYS_HI_FUNCTION __BITS(10,8) 41 #define PHYS_HI_REGISTER __BITS(7,0) 42 43 extern int pcihost_segment; 44 45 enum pcihost_type { 46 PCIHOST_CAM = 1, 47 PCIHOST_ECAM, 48 }; 49 50 struct pcihost_msi_handlers; 51 52 struct pcih_bus_space { 53 struct bus_space bst; 54 55 int (*map)(void *, bus_addr_t, bus_size_t, 56 int, bus_space_handle_t *); 57 int flags; 58 59 struct space_range { 60 bus_addr_t bpci; 61 bus_addr_t bbus; 62 bus_size_t size; 63 } ranges[4]; 64 size_t nranges; 65 }; 66 67 struct pcihost_softc { 68 device_t sc_dev; 69 bus_dma_tag_t sc_dmat; 70 bus_space_tag_t sc_bst; 71 bus_space_handle_t sc_bsh; 72 bus_space_tag_t sc_pci_bst; 73 int sc_phandle; 74 75 enum pcihost_type sc_type; 76 77 u_int sc_seg; 78 u_int sc_bus_min; 79 u_int sc_bus_max; 80 81 struct arm32_pci_chipset sc_pc; 82 83 struct pcih_bus_space sc_io; 84 struct pcih_bus_space sc_mem; 85 86 int sc_pci_flags; 87 88 const u_int *sc_pci_ranges; 89 u_int sc_pci_ranges_cells; 90 91 kmutex_t sc_msi_handlers_mutex; 92 LIST_HEAD(, pcihost_msi_handler) 93 sc_msi_handlers; 94 }; 95 96 void pcihost_init2(struct pcihost_softc *); 97 void pcihost_init(pci_chipset_tag_t, void *); 98