xref: /netbsd-src/sys/arch/arm/arm32/intr.c (revision 79ef8ec54bf63a423fd1a54a579969260a331abd)
1 /*	$NetBSD: intr.c,v 1.36 2020/06/20 07:10:36 skrll Exp $	*/
2 
3 /*
4  * Copyright (c) 1994-1998 Mark Brinicombe.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Mark Brinicombe
18  *	for the NetBSD Project.
19  * 4. The name of the company nor the name of the author may be used to
20  *    endorse or promote products derived from this software without specific
21  *    prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  * Soft interrupt and other generic interrupt functions.
36  */
37 
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.36 2020/06/20 07:10:36 skrll Exp $");
40 
41 #include <sys/param.h>
42 
43 #include <sys/conf.h>
44 #include <sys/cpu.h>
45 #include <sys/intr.h>
46 #include <sys/systm.h>
47 
48 #include <uvm/uvm_extern.h>
49 
50 #include <arm/arm32/machdep.h>
51 
52 u_int spl_masks[NIPL];
53 
54 extern u_int irqmasks[];
55 
56 void
set_spl_masks(void)57 set_spl_masks(void)
58 {
59 	int loop;
60 
61 	for (loop = 0; loop < NIPL; ++loop) {
62 		spl_masks[loop] = 0xffffffff;
63 	}
64 
65 	spl_masks[IPL_VM]	  = irqmasks[IPL_VM];
66 	spl_masks[IPL_SCHED]	  = irqmasks[IPL_SCHED];
67 	spl_masks[IPL_HIGH]	  = irqmasks[IPL_HIGH];
68 	spl_masks[IPL_SOFTSERIAL] = irqmasks[IPL_SOFTSERIAL];
69 	spl_masks[IPL_SOFTNET]	  = irqmasks[IPL_SOFTNET];
70 	spl_masks[IPL_SOFTBIO]	  = irqmasks[IPL_SOFTBIO];
71 	spl_masks[IPL_SOFTCLOCK]  = irqmasks[IPL_SOFTCLOCK];
72 	spl_masks[IPL_NONE]	  = irqmasks[IPL_NONE];
73 
74 }
75 
76 #ifdef DIAGNOSTIC
77 void
dump_spl_masks(void)78 dump_spl_masks(void)
79 {
80 	int loop;
81 
82 	for (loop = 0; loop < NIPL; ++loop)
83 		printf("spl_masks[%d]=%08x\n", loop, spl_masks[loop]);
84 }
85 #endif
86 
87 /* End of intr.c */
88