xref: /netbsd-src/sys/arch/arm/amlogic/meson_rtcreg.h (revision f9c08fdbcf17c5d361c99100d47f56df5f07daaa)
1 /* $NetBSD: meson_rtcreg.h,v 1.1 2019/01/20 17:58:22 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2015 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #ifndef _MESON_RTCREG_H_
30 #define _MESON_RTCREG_H_
31 
32 #define AO_RTC_REG0			0x00
33 #define AO_RTC_REG1			0x04
34 #define AO_RTC_REG2			0x08
35 #define AO_RTC_REG3			0x0c
36 #define AO_RTC_REG4			0x10
37 
38 #define AO_RTC_REG0_STATIC_REG_LSB	__BITS(31,24)
39 #define AO_RTC_REG0_UNUSED_23		__BIT(23)
40 #define AO_RTC_REG0_SERIAL_BUSY		__BIT(22)
41 #define AO_RTC_REG0_UNUSED_21		__BIT(21)
42 #define AO_RTC_REG0_SCLK_STATIC		__BIT(20)
43 #define AO_RTC_REG0_UNUSED_19_18	__BITS(19,18)
44 #define AO_RTC_REG0_SERIAL_START	__BIT(17)
45 #define AO_RTC_REG0_ONE_SHOT_POLARITY	__BIT(16)
46 #define AO_RTC_REG0_RESERVED_15_11	__BIT(15,11)
47 #define AO_RTC_REG0_UNUSED_10_8		__BITS(10,8)
48 #define AO_RTC_REG0_RESERVED_7_6	__BIT(7,6)
49 #define AO_RTC_REG0_TEST_MODE		__BIT(5)
50 #define AO_RTC_REG0_TEST_CLK		__BIT(4)
51 #define AO_RTC_REG0_TEST_BYPASS		__BIT(3)
52 #define AO_RTC_REG0_SDI			__BIT(2)
53 #define AO_RTC_REG0_SEN			__BIT(1)
54 #define AO_RTC_REG0_SCLK		__BIT(0)
55 
56 #define AO_RTC_REG1_UNUSED_31_16	__BITS(31,16)
57 #define AO_RTC_REG1_RESERVED		__BITS(15,12)
58 #define AO_RTC_REG1_UNUSED_11_4		__BITS(11,4)
59 #define AO_RTC_REG1_GPO_TO_DIG		__BIT(3)
60 #define AO_RTC_REG1_GPI_TO_DIG		__BIT(2)
61 #define AO_RTC_REG1_S_READY		__BIT(1)
62 #define AO_RTC_REG1_SDO			__BIT(0)
63 
64 #define AO_RTC_REG2_OSC_CLK_COUNT	__BITS(31,0)
65 
66 #define AO_RTC_REG3_UNUSED_31_30	__BITS(31,30)
67 #define AO_RTC_REG3_USE_CLK_TB		__BIT(29)
68 #define AO_RTC_REG3_USE_NIKE_D_RTC	__BIT(28)
69 #define AO_RTC_REG3_AUTO_TB_SEL		__BITS(27,26)
70 #define AO_RTC_REG3_FILTER_SEL		__BITS(25,23)
71 #define AO_RTC_REG3_FILTER_TB		__BITS(22,21)
72 #define AO_RTC_REG3_MSR_BUSY		__BIT(20)
73 #define AO_RTC_REG3_UNUSED_19		__BIT(19)
74 #define AO_RTC_REG3_FAST_CLK_MODE	__BIT(18)
75 #define AO_RTC_REG3_COUNT_ALWAYS	__BIT(17)
76 #define AO_RTC_REG3_MSR_EN		__BIT(16)
77 #define AO_RTC_REG3_MSR_GATE_TIME	__BIT(15,0)
78 
79 #define AO_RTC_REG4_UNUSED		__BITS(31,8)
80 #define AO_RTC_REG4_STATIC_REG_MSB	__BITS(7,0)
81 
82 /* Define RTC register address mapping */
83 #define RTC_COUNTER_ADDR		0
84 #define RTC_GPO_COUNTER_ADDR		1
85 #define RTC_SEC_ADJUST_ADDR		2
86 #define RTC_UNUSED_ADDR			3
87 #define RTC_REGMEM_ADDR0		4
88 #define RTC_REGMEM_ADDR1		5
89 #define RTC_REGMEM_ADDR2		6
90 #define RTC_REGMEM_ADDR3		7
91 
92 #define RTC_COUNTER_VALUE		__BITS(31,0)
93 #define RTC_SEC_ADJUST_PENDING		__BIT(25)
94 #define RTC_SEC_ADJUST_INC		__BIT(24)
95 #define RTC_SEC_ADJUST_VALID		__BIT(23)
96 #define RTC_SEC_ADJUST_MONITOR		__BIT(22)
97 #define RTC_SEC_ADJUST_RESERVED		__BIT(21)
98 #define RTC_SEC_ADJUST_CTRL		__BITS(20,19)
99 #define RTC_SEC_ADJUST_COUNTER		__BITS(18,0)
100 
101 #endif /* _MESON_RTCREG_H_ */
102