1 /* $NetBSD: grf_ul.c,v 1.56 2023/12/20 00:40:42 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1995 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Ignatios Souvatzis.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "opt_amigacons.h"
33
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: grf_ul.c,v 1.56 2023/12/20 00:40:42 thorpej Exp $");
36
37 #include "grful.h"
38 #include "ite.h"
39 #if NGRFUL > 0
40
41 /* Graphics routines for the University of Lowell A2410 board,
42 using the TMS34010 processor. */
43
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/errno.h>
47 #include <sys/ioctl.h>
48 #include <sys/device.h>
49 #include <sys/device_impl.h> /* XXX autoconf abuse */
50 #include <sys/syslog.h>
51
52 #include <machine/cpu.h>
53
54 #include <amiga/amiga/device.h>
55 #include <amiga/amiga/isr.h>
56 #include <amiga/dev/zbusvar.h>
57 #include <amiga/dev/grfioctl.h>
58 #include <amiga/dev/grfvar.h>
59 #include <amiga/dev/grf_ulreg.h>
60
61 extern u_int16_t tmscode[];
62
63 int ul_ioctl(struct grf_softc *, u_long, void *, dev_t);
64 int ul_getcmap(struct grf_softc *, struct grf_colormap *, dev_t);
65 int ul_putcmap(struct grf_softc *, struct grf_colormap *, dev_t);
66 int ul_bitblt(struct grf_softc *, struct grf_bitblt *, dev_t);
67 int ul_blank(struct grf_softc *, int *, dev_t);
68
69 static int ulisr(void *);
70 int ulowell_alive(struct grfvideo_mode *);
71 static void ul_load_code(struct grf_softc *);
72 static int ul_load_mon(struct grf_softc *, struct grfvideo_mode *);
73 static int ul_getvmode(struct grf_softc *, struct grfvideo_mode *);
74 static int ul_setvmode(struct grf_softc *, unsigned);
75 static inline void ul_setfb(struct grf_softc *, u_long);
76
77 /*
78 * marked true early so that ulowell_cnprobe() can tell if we are alive.
79 */
80 int ulowell_inited;
81
82 /* standard-palette definition */
83 u_int8_t ul_std_palette[] = {
84 0,128, 0,128, 0,128, 0,128, 0,255, 0,255, 0,255, 0,255,
85 0, 0,128,128, 0, 0,128,128, 0, 0,255,255, 0, 0,255,255,
86 0, 0, 0, 0, 128,128,128,128, 0, 0, 0, 0, 255,255,255,255};
87
88 u_int8_t ul_ovl_palette[] = {
89 128, 0, 0, 0,
90 128, 0, 0, 0,
91 128, 0, 0, 0};
92
93 struct grfvideo_mode ul_monitor_defs[] = {
94
95 /*
96 * We give all these values in MI units, that is:
97 * horizontal timings in units of pixels
98 * vertical timings in units of lines
99 * point of reference is blanking end.
100 *
101 * The ul_load_mon transforms these values right before loading
102 * them into the chip.
103 *
104 * This leaves us with a single point where things are transformed,
105 * which should make life easier if we ever change things again.
106 */
107
108 /* 1024x768, 60Hz */
109 {1,"1024x768", 66667000, 1024,768,8, 1024,1088,1296,1392,
110 768,771,774,798, 0},
111 /* 864x648, 70Hz */
112 {2,"864x648", 50000000, 864,648,8, 864,928,992,1056,
113 648,658,663,678, 0},
114 /* 800x600, 60Hz */
115 {3, "800x600", 36000000, 800,600,8, 800,864,928,992,
116 600,610,615,630, 0},
117 /* 640x400, 60 Hz, interlaced */
118 {4, "640x400i", 14318000, 640,400,8, 640,768,832,912,
119 200,223,203,240, 1},
120 /* 1024x768, 65Hz interlaced, s.th. is strange */
121 {5, "1024x768?i", 44980000, 1024,768,8, 1024,1072,1136,1280,
122 488,509,512,534, 1},
123 /* 1024x1024, 60Hz */
124 {6, "1024x1024", 80000000, 1024,1024,8, 1024,1040,1120,1248,
125 1024,1027,1030,1055, 0},
126 /* 736x480, 60 Hz */
127 {7, "736x480", 28636300, 736,480,8, 736,784,848,928,
128 480,491,495,515, 0},
129 };
130
131 int ulowell_mon_max = sizeof (ul_monitor_defs)/sizeof (ul_monitor_defs[0]);
132
133 /* option settable */
134 #ifndef ULOWELL_OSC1
135 #define ULOWELL_OSC1 36000000
136 #endif
137
138 #ifndef ULOWELL_OSC2
139 #define ULOWELL_OSC2 66667000
140 #endif
141
142 #ifndef ULOWELL_DEFAULT_MON
143 #define ULOWELL_DEFAULT_MON 1
144 #endif
145
146 /* patchable */
147 int ulowell_default_mon = ULOWELL_DEFAULT_MON;
148 int ulowell_default_gfx = ULOWELL_DEFAULT_MON;
149
150 /*
151 * yes, this should be per board. We don't pay service to multiple boards,
152 * anyway.
153 */
154
155 u_long ulowell_clock[2] = { ULOWELL_OSC2, ULOWELL_OSC1 };
156
157 static struct grfvideo_mode *current_mon;
158
159 /*
160 * We dont use ints at the moment, but will need this later to avoid
161 * busy_waiting in gsp_write, and we use it for spurious int warnings.
162 */
163
164 static int
ulisr(void * arg)165 ulisr(void *arg)
166 {
167 struct grf_softc *gp = arg;
168 volatile struct gspregs *ba;
169 u_int16_t thebits;
170
171 if (gp == NULL)
172 return 0;
173
174 ba = (volatile struct gspregs *)gp->g_regkva;
175
176 if (ba == NULL)
177 return 0;
178
179 thebits = ba->ctrl;
180 if (thebits & INTOUT) {
181 log(LOG_INFO, "grf4: got interrupt, ctrl=0x%4x\n", thebits);
182 /* clear int */
183 ba->ctrl = thebits & ~INTOUT;
184 return 1;
185 }
186 return 0;
187 }
188
189 /*
190 * used to query the ulowell board to see if its alive.
191 * for the moment, a NOP.
192 */
193 int
ulowell_alive(struct grfvideo_mode * mdp)194 ulowell_alive(struct grfvideo_mode *mdp)
195 {
196 return 1;
197 }
198
199 /*
200 * Load the (mostly) ite support code and the default colormaps.
201 */
202 static void
ul_load_code(struct grf_softc * gp)203 ul_load_code(struct grf_softc *gp)
204 {
205 struct grf_ul_softc *gup;
206 volatile struct gspregs *ba;
207 struct grfinfo *gi;
208 int i,j;
209 #if 0
210 struct grf_colormap gcm;
211 #endif
212
213 gup = (struct grf_ul_softc *)gp;
214 ba = (volatile struct gspregs *)gp->g_regkva;
215 gi = &gp->g_display;
216
217 gi->gd_regaddr = ztwopa((volatile void *)ba);
218 gi->gd_regsize = sizeof(struct gspregs);
219 gi->gd_fbaddr = NULL;
220 gi->gd_fbsize = 0;
221 gi->gd_fbwidth = 1024;
222 gi->gd_fbheight = 1024;
223 gi->gd_colors = 256;
224
225 ba->ctrl = (ba->ctrl & ~INCR) | (LBL | INCW);
226 ba->hstadrh = 0xC000;
227 ba->hstadrl = 0x0080;
228 ba->data = 0x0; /* disable screen refresh and video output */
229 ba->data = 0xFFFC; /* screen refresh base address */
230 ba->data = 0xFFFF; /* no display int possible */
231 ba->data = 0x000C; /* CAS before RAS refresh each 64 local clks */
232
233 ba->ctrl = (ba->ctrl & ~INCW) | LBL;
234 ba->hstadrh = 0xfe80;
235 ba->hstadrl = 0;
236 ba->data = 4;
237 ba->hstadrl = 0x20;
238 ba->data = 0xFF; /* all color planes visible */
239
240 ba->hstadrl = 0;
241 ba->data = 5;
242 ba->hstadrl = 0x20;
243 ba->data = 0; /* no color planes blinking */
244
245 ba->hstadrl = 0;
246 ba->data = 6;
247 ba->hstadrl = 0x20;
248 ba->data = gup->gus_ovslct = 0x43;
249 /* overlay visible, no overlay blinking, overlay color 0 transparent */
250
251 ba->hstadrl = 0;
252 ba->data = 7;
253 ba->hstadrl = 0x20;
254 ba->data = 0; /* voodoo */
255
256 /* clear overlay planes */
257 ba->ctrl |= INCW;
258 ba->hstadrh = 0xff80;
259 ba->hstadrl = 0x0000;
260 for (i=0xff80000; i< 0xffa0000; ++i) {
261 ba->data = 0;
262 }
263
264 /* download tms code */
265
266 ba->ctrl = LBL | INCW | NMI | NMIM | HLT | CF;
267
268 printf("\ndownloading TMS code");
269 i=0;
270 while ((j = tmscode[i++])) {
271 printf(".");
272 ba->hstadrh = tmscode[i++];
273 ba->hstadrl = tmscode[i++];
274 while (j-- > 0) {
275 ba->data = tmscode[i++];
276 }
277 }
278
279 /* font info was uploaded in ite_ul.c(ite_ulinit). */
280
281 #if 1
282 /* XXX load image palette with some initial values, slightly hacky */
283
284 ba->hstadrh = 0xfe80;
285 ba->hstadrl = 0x0000;
286 ba->ctrl |= INCW;
287 ba->data = 0;
288 ba->ctrl &= ~INCW;
289
290 for (i=0; i<16; ++i) {
291 ba->data = gup->gus_imcmap[i+ 0] = ul_std_palette[i+ 0];
292 ba->data = gup->gus_imcmap[i+256] = ul_std_palette[i+16];
293 ba->data = gup->gus_imcmap[i+512] = ul_std_palette[i+32];
294 }
295
296 /*
297 * XXX load shadow overlay palette with what the TMS code will load
298 * into the real one some time after the TMS code is started below.
299 * This might be considered a rude hack.
300 */
301 memcpy(gup->gus_ovcmap, ul_ovl_palette, 3*4);
302
303 /*
304 * Unflush cache, unhalt CPU -> nmi starts to run. This MUST NOT BE
305 * DONE before the image color map initialization above, to guarantee
306 * the index register in the BT458 is not used by more than one CPU
307 * at once.
308 *
309 * XXX For the same reason, we'll have to rething ul_putcmap(). For
310 * details, look at comment there.
311 */
312 ba->ctrl &= ~(HLT|CF);
313
314 #else
315 /*
316 * XXX I wonder why this partially ever worked.
317 *
318 * This can't possibly work this way, as we are copyin()ing data in
319 * ul_putcmap.
320 *
321 * I guess this partially worked because SFC happened to point to
322 * to supervisor data space on 68030 machines coming from the old
323 * boot loader.
324 *
325 * While this looks more correct than the hack in the other part of the
326 * loop, we would have to do our own version of the loop through
327 * colormap entries, set up command buffer, and call gsp_write(), or
328 * factor out some code.
329 */
330
331 /*
332 * XXX This version will work for the overlay, if our queue codes
333 * initial conditions are set at load time (not start time).
334 * It further assumes that ul_putcmap only uses the
335 * GRFIMDEV/GRFOVDEV bits of the dev parameter.
336 */
337
338
339 /* unflush cache, unhalt CPU first -> nmi starts to run */
340 ba->ctrl &= ~(HLT|CF);
341
342 gcm.index = 0;
343 gcm.count = 16;
344 gcm.red = ul_std_palette + 0;
345 gcm.green = ul_std_palette + 16;
346 gcm.blue = ul_std_palette + 32;
347 ul_putcmap(gp, &gcm, GRFIMDEV);
348
349 gcm.index = 0;
350 gcm.count = 4;
351 gcm.red = ul_ovl_palette + 0;
352 gcm.green = ul_ovl_palette + 4;
353 gcm.blue = ul_ovl_palette + 8;
354 ul_putcmap(gp, &gcm, GRFOVDEV);
355 #endif
356
357 }
358
359 static int
ul_load_mon(struct grf_softc * gp,struct grfvideo_mode * md)360 ul_load_mon(struct grf_softc *gp, struct grfvideo_mode *md)
361 {
362 struct grfinfo *gi;
363 volatile struct gspregs *ba;
364 u_int16_t buf[8];
365
366 gi = &gp->g_display;
367 ba = (volatile struct gspregs *)gp->g_regkva;
368
369 gi->gd_dyn.gdi_fbx = 0;
370 gi->gd_dyn.gdi_fby = 0;
371 gi->gd_dyn.gdi_dwidth = md->disp_width;
372 gi->gd_dyn.gdi_dheight = md->disp_height;
373 gi->gd_dyn.gdi_dx = 0;
374 gi->gd_dyn.gdi_dy = 0;
375
376 ba->ctrl = (ba->ctrl & ~INCR) | (LBL | INCW); /* XXX */
377
378 ba->hstadrh = 0xC000;
379 ba->hstadrl = 0x0000;
380
381 ba->data = (md->hsync_stop - md->hsync_start)/16;
382 ba->data = (md->htotal - md->hsync_start)/16 - 1;
383 ba->data = (md->hblank_start + md->htotal - md->hsync_start)/16 - 1;
384 ba->data = md->htotal/16 - 1;
385
386 ba->data = md->vsync_stop - md->vsync_start;
387 ba->data = md->vtotal - md->vsync_start - 1;
388 ba->data = md->vblank_start + md->vtotal - md->vsync_start - 1;
389 ba->data = md->vtotal - 1;
390
391 ba->ctrl &= ~INCW;
392 ba->hstadrh = 0xFE90;
393 ba->hstadrl = 0x0000;
394
395 if (abs(md->pixel_clock - ulowell_clock[0]) >
396 abs(md->pixel_clock - ulowell_clock[1])) {
397
398 ba->data = (ba->data & 0xFC) | 2 | 1;
399 md->pixel_clock = ulowell_clock[1];
400
401 } else {
402 ba->data = (ba->data & 0xFC) | 2 | 0;
403 md->pixel_clock = ulowell_clock[0];
404 }
405
406 ba->ctrl |= LBL | INCW;
407 ba->hstadrh = 0xC000;
408 ba->hstadrl = 0x0080;
409 ba->data = md->disp_flags & GRF_FLAGS_LACE ? 0xb020 : 0xf020;
410
411 /* I guess this should be in the yet unimplemented mode select ioctl */
412 /* Hm.. maybe not. We always put the console on overlay plane no 0. */
413 /* Anyway, this _IS_ called in the mode select ioctl. */
414
415 /* ite support code parameters: */
416 buf[0] = GCMD_MCHG;
417 buf[1] = md->disp_width; /* display width */
418 buf[2] = md->disp_height; /* display height */
419 buf[3] = 0; /* LSW of frame buffer origin */
420 buf[4] = 0xFF80; /* MSW of frame buffer origin */
421 buf[5] = gi->gd_fbwidth * 1; /* frame buffer pitch */
422 buf[6] = 1; /* frame buffer depth */
423 gsp_write(ba, buf, 7);
424
425 return(1);
426 }
427
428 int ul_mode(struct grf_softc *, u_long, void *, u_long, int);
429
430 void grfulattach(device_t, device_t, void *);
431 int grfulprint(void *, const char *);
432 int grfulmatch(device_t, cfdata_t, void *);
433
434 CFATTACH_DECL_NEW(grful, sizeof(struct grf_ul_softc),
435 grfulmatch, grfulattach, NULL, NULL);
436
437 /*
438 * only used in console init
439 */
440 static struct cfdata *cfdata;
441
442 /*
443 * we make sure to only init things once. this is somewhat
444 * tricky regarding the console.
445 */
446 int
grfulmatch(device_t parent,cfdata_t cf,void * aux)447 grfulmatch(device_t parent, cfdata_t cf, void *aux)
448 {
449 #ifdef ULOWELLCONSOLE
450 static int ulconunit = -1;
451 #endif
452 struct zbus_args *zap;
453
454 zap = aux;
455
456 /*
457 * allow only one ulowell console
458 */
459 if (amiga_realconfig == 0)
460 #ifdef ULOWELLCONSOLE
461 if (ulconunit != -1)
462 #endif
463 return(0);
464
465 if (zap->manid != 1030 || zap->prodid != 0)
466 return(0);
467
468 #ifdef ULOWELLCONSOLE
469 if (amiga_realconfig == 0 || ulconunit != cf->cf_unit) {
470 #endif
471 if ((unsigned)ulowell_default_mon > ulowell_mon_max)
472 ulowell_default_mon = 1;
473
474 current_mon = ul_monitor_defs + ulowell_default_mon - 1;
475 if (ulowell_alive(current_mon) == 0)
476 return(0);
477 #ifdef ULOWELLCONSOLE
478 if (amiga_realconfig == 0) {
479 ulconunit = cf->cf_unit;
480 cfdata = cf;
481 }
482 }
483 #endif
484 return(1);
485 }
486
487 /*
488 * attach to the grfbus (zbus)
489 */
490 void
grfulattach(device_t parent,device_t self,void * aux)491 grfulattach(device_t parent, device_t self, void *aux)
492 {
493 static struct grf_ul_softc congrf;
494 struct device temp;
495 struct zbus_args *zap;
496 struct grf_softc *gp;
497 struct grf_ul_softc *gup;
498
499 zap = aux;
500
501 if (self == NULL) {
502 gup = &congrf;
503 gp = &gup->gus_sc;
504 gp->g_device = &temp;
505 temp.dv_private = gp;
506 } else {
507 gup = device_private(self);
508 gp = &gup->gus_sc;
509 gp->g_device = self;
510 }
511
512 if (self != NULL && congrf.gus_sc.g_regkva != 0) {
513 /*
514 * inited earlier, just copy (not device struct)
515 */
516 memcpy(&gp->g_display, &congrf.gus_sc.g_display,
517 (char *)&gup->gus_isr - (char *)&gp->g_display);
518
519 /* ...and transfer the isr */
520 gup->gus_isr.isr_ipl = 2;
521 gup->gus_isr.isr_intr = ulisr;
522 gup->gus_isr.isr_arg = (void *)gp;
523 /*
524 * To make sure ints are always caught, first add new isr
525 * then remove old:
526 */
527 add_isr(&gup->gus_isr);
528 remove_isr(&congrf.gus_isr);
529 } else {
530 gp->g_regkva = (void *)zap->va;
531 gp->g_fbkva = NULL;
532 gp->g_unit = GRF_ULOWELL_UNIT;
533 gp->g_flags = GF_ALIVE;
534 gp->g_mode = ul_mode;
535 #if NITE > 0
536 gp->g_conpri = grful_cnprobe();
537 #endif
538 gp->g_data = NULL;
539
540 gup->gus_isr.isr_ipl = 2;
541 gup->gus_isr.isr_intr = ulisr;
542 gup->gus_isr.isr_arg = (void *)gp;
543 add_isr(&gup->gus_isr);
544
545 (void)ul_load_code(gp);
546 (void)ul_load_mon(gp, current_mon);
547 #if NITE > 0
548 grful_iteinit(gp);
549 #endif
550 }
551 if (self != NULL)
552 printf("\n");
553 /*
554 * attach grf
555 */
556 amiga_config_found(cfdata, gp->g_device, gp, grfulprint, CFARGS_NONE);
557 }
558
559 int
grfulprint(void * aux,const char * pnp)560 grfulprint(void *aux, const char *pnp)
561 {
562 if (pnp)
563 aprint_normal("grf%d at %s", ((struct grf_softc *)aux)->g_unit,
564 pnp);
565 return(UNCONF);
566 }
567
568 static int
ul_getvmode(struct grf_softc * gp,struct grfvideo_mode * vm)569 ul_getvmode (struct grf_softc *gp, struct grfvideo_mode *vm)
570 {
571 struct grfvideo_mode *md;
572
573 if (vm->mode_num && vm->mode_num > ulowell_mon_max)
574 return EINVAL;
575
576 if (! vm->mode_num)
577 vm->mode_num = current_mon - ul_monitor_defs + 1;
578
579 md = ul_monitor_defs + vm->mode_num - 1;
580 strncpy (vm->mode_descr, md->mode_descr,
581 sizeof (vm->mode_descr));
582
583 /* XXX should tell TMS to measure it */
584 vm->pixel_clock = md->pixel_clock;
585 vm->disp_width = md->disp_width;
586 vm->disp_height = md->disp_height;
587 vm->depth = md->depth;
588
589 vm->hblank_start = md->hblank_start;
590 vm->hsync_start = md->hsync_start;
591 vm->hsync_stop = md->hsync_stop;
592 vm->htotal = md->htotal;
593
594 vm->vblank_start = md->vblank_start;
595 vm->vsync_start = md->vsync_start;
596 vm->vsync_stop = md->vsync_stop;
597 vm->vtotal = md->vtotal;
598
599 vm->disp_flags = md->disp_flags;
600 return 0;
601 }
602
603
604 static int
ul_setvmode(struct grf_softc * gp,unsigned mode)605 ul_setvmode (struct grf_softc *gp, unsigned mode)
606 {
607 int error;
608
609 if (!mode || mode > ulowell_mon_max)
610 return EINVAL;
611
612 current_mon = ul_monitor_defs + mode - 1;
613
614 error = ul_load_mon (gp, current_mon) ? 0 : EINVAL;
615
616 return error;
617 }
618
619 /*
620 * Set the frame buffer or overlay planes on or off.
621 * Always succeeds.
622 */
623
624 static inline void
ul_setfb(struct grf_softc * gp,u_long cmd)625 ul_setfb(struct grf_softc *gp, u_long cmd)
626 {
627 struct grf_ul_softc *gup;
628 volatile struct gspregs *ba;
629
630 gup = (struct grf_ul_softc *)gp;
631
632 ba = (volatile struct gspregs *)gp->g_regkva;
633 ba->ctrl = LBL;
634 ba->hstadrh = 0xfe80;
635 ba->hstadrl = 0x0000;
636 ba->data = 6;
637 ba->hstadrl = 0x0020;
638
639 switch (cmd) {
640 case GM_GRFON:
641 gup->gus_ovslct |= 0x40;
642 break;
643 case GM_GRFOFF:
644 gup->gus_ovslct &= ~0x40;
645 break;
646 case GM_GRFOVON:
647 gup->gus_ovslct |= 3;
648 break;
649 case GM_GRFOVOFF:
650 gup->gus_ovslct &= ~3;
651 break;
652 }
653 ba->data = gup->gus_ovslct;
654 }
655
656 /*
657 * Change the mode of the display.
658 * Return a UNIX error number or 0 for success.
659 */
660 int
ul_mode(struct grf_softc * gp,u_long cmd,void * arg,u_long a2,int a3)661 ul_mode(struct grf_softc *gp, u_long cmd, void *arg, u_long a2, int a3)
662 {
663 int i;
664 struct grfdyninfo *gd;
665
666 switch (cmd) {
667 case GM_GRFON:
668 case GM_GRFOFF:
669 case GM_GRFOVON:
670 case GM_GRFOVOFF:
671 ul_setfb (gp, cmd);
672 return 0;
673
674 case GM_GRFCONFIG:
675 gd = (struct grfdyninfo *)arg;
676 for (i=0; i<ulowell_mon_max; ++i) {
677 if (ul_monitor_defs[i].disp_width == gd->gdi_dwidth &&
678 ul_monitor_defs[i].disp_height == gd->gdi_dheight)
679 return ul_setvmode(gp, i+1);
680 }
681 return EINVAL;
682
683 case GM_GRFGETVMODE:
684 return ul_getvmode (gp, (struct grfvideo_mode *) arg);
685
686 case GM_GRFSETVMODE:
687 return ul_setvmode (gp, *(unsigned *) arg);
688
689 case GM_GRFGETNUMVM:
690 *(int *)arg = ulowell_mon_max;
691 return 0;
692
693 case GM_GRFIOCTL:
694 return ul_ioctl (gp, a2, arg, (dev_t)a3);
695
696 default:
697 break;
698 }
699
700 return EPASSTHROUGH;
701 }
702
703 int
ul_ioctl(register struct grf_softc * gp,u_long cmd,void * data,dev_t dev)704 ul_ioctl (register struct grf_softc *gp, u_long cmd, void *data, dev_t dev)
705 {
706 switch (cmd) {
707 #if 0
708 /*
709 * XXX we have no hardware sprites, but might implement them
710 * later in TMS code.
711 */
712
713 case GRFIOCGSPRITEPOS:
714 return ul_getspritepos (gp, (struct grf_position *) data);
715
716 case GRFIOCSSPRITEPOS:
717 return ul_setspritepos (gp, (struct grf_position *) data);
718
719 case GRFIOCSSPRITEINF:
720 return ul_setspriteinfo (gp, (struct grf_spriteinfo *) data);
721
722 case GRFIOCGSPRITEINF:
723 return ul_getspriteinfo (gp, (struct grf_spriteinfo *) data);
724
725 case GRFIOCGSPRITEMAX:
726 return ul_getspritemax (gp, (struct grf_position *) data);
727
728 #endif
729
730 case GRFIOCGETCMAP:
731 return ul_getcmap (gp, (struct grf_colormap *) data, dev);
732
733 case GRFIOCPUTCMAP:
734 return ul_putcmap (gp, (struct grf_colormap *) data, dev);
735
736 case GRFIOCBITBLT:
737 return ul_bitblt (gp, (struct grf_bitblt *) data, dev);
738
739 case GRFIOCBLANK:
740 return ul_blank (gp, (int *) data, dev);
741 }
742
743 return EPASSTHROUGH;
744 }
745
746 int
ul_getcmap(struct grf_softc * gp,struct grf_colormap * cmap,dev_t dev)747 ul_getcmap (struct grf_softc *gp, struct grf_colormap *cmap, dev_t dev)
748 {
749 struct grf_ul_softc *gup;
750 u_int8_t *mymap;
751 int mxidx, error;
752
753 gup = (struct grf_ul_softc *)gp;
754
755 if (minor(dev) & GRFIMDEV) {
756 mxidx = 256;
757 mymap = gup->gus_imcmap;
758 } else {
759 mxidx = 4;
760 mymap = gup->gus_ovcmap;
761 }
762
763 if (cmap->count == 0 || cmap->index >= mxidx)
764 return 0;
765
766 if (cmap->count > mxidx - cmap->index)
767 cmap->count = mxidx - cmap->index;
768
769 /* just copyout from the shadow color map */
770
771 if ((error = copyout(mymap + cmap->index, cmap->red, cmap->count))
772
773 || (error = copyout(mymap + mxidx + cmap->index, cmap->green,
774 cmap->count))
775
776 || (error = copyout(mymap + mxidx * 2 + cmap->index, cmap->blue,
777 cmap->count)))
778
779 return(error);
780
781 return(0);
782 }
783
784 int
ul_putcmap(struct grf_softc * gp,struct grf_colormap * cmap,dev_t dev)785 ul_putcmap (struct grf_softc *gp, struct grf_colormap *cmap, dev_t dev)
786 {
787 struct grf_ul_softc *gup;
788 volatile struct gspregs *ba;
789 u_int16_t cmd[8];
790 int x, mxidx, error;
791 u_int8_t *mymap;
792
793 gup = (struct grf_ul_softc *)gp;
794
795 if (minor(dev) & GRFIMDEV) {
796 mxidx = 256;
797 mymap = gup->gus_imcmap;
798 } else {
799 mxidx = 4;
800 mymap = gup->gus_ovcmap;
801 }
802
803 if (cmap->count == 0 || cmap->index >= mxidx)
804 return 0;
805
806 if (cmap->count > mxidx - cmap->index)
807 cmap->count = mxidx - cmap->index;
808
809 /* first copyin to our shadow color map */
810
811 if ((error = copyin(cmap->red, mymap + cmap->index, cmap->count))
812
813 || (error = copyin(cmap->green, mymap + cmap->index + mxidx,
814 cmap->count))
815
816 || (error = copyin(cmap->blue, mymap + cmap->index + mxidx*2,
817 cmap->count)))
818
819 return error;
820
821
822 /* then write from there to the hardware */
823 ba = (volatile struct gspregs *)gp->g_regkva;
824 /*
825 * XXX This is a bad thing to do.
826 * We should always use the gsp call, or have a means to arbitrate
827 * the usage of the BT458 index register. Else there might be a
828 * race condition (when writing both colormaps at nearly the same
829 * time), where one CPU changes the index register when the other
830 * one has not finished using it.
831 */
832 if (mxidx > 4) {
833 /* image color map: we can write, with a hack, directly */
834 ba->ctrl = LBL;
835 ba->hstadrh = 0xfe80;
836 ba->hstadrl = 0x0000;
837 ba->ctrl |= INCW;
838 ba->data = cmap->index;
839 ba->ctrl &= ~INCW;
840
841 for (x=cmap->index; x < cmap->index + cmap->count; ++x) {
842 ba->data = (u_int16_t) mymap[x];
843 ba->data = (u_int16_t) mymap[x + mxidx];
844 ba->data = (u_int16_t) mymap[x + mxidx * 2];
845 }
846 } else {
847
848 /* overlay planes color map: have to call tms to do it */
849 cmd[0] = GCMD_CMAP;
850 cmd[1] = 1;
851 for (x=cmap->index; x < cmap->index + cmap->count; ++x) {
852 cmd[2] = x;
853 cmd[3] = mymap[x];
854 cmd[4] = mymap[x + mxidx];
855 cmd[5] = mymap[x + mxidx * 2];
856 gsp_write(ba, cmd, 6);
857 }
858 }
859 return 0;
860 }
861
862 int
ul_blank(struct grf_softc * gp,int * onoff,dev_t dev)863 ul_blank(struct grf_softc *gp, int *onoff, dev_t dev)
864 {
865 volatile struct gspregs *gsp;
866
867 gsp = (volatile struct gspregs *)gp->g_regkva;
868 gsp->ctrl = (gsp->ctrl & ~(INCR | INCW)) | LBL;
869 gsp->hstadrh = 0xC000;
870 gsp->hstadrl = 0x0080;
871 if (*onoff > 0)
872 gsp->data |= 0x9000;
873 else
874 gsp->data &= ~0x9000;
875
876 return 0;
877 }
878 /*
879 * !!! THIS AREA UNDER CONSTRUCTION !!!
880 */
881 int ul_BltOpMap[16] = {
882 3, 1, 2, 0, 11, 9, 10, 8,
883 7, 5, 6, 4, 15, 13, 14, 12
884 };
885
886 int
ul_bitblt(struct grf_softc * gp,struct grf_bitblt * bb,dev_t dev)887 ul_bitblt (struct grf_softc *gp, struct grf_bitblt *bb, dev_t dev)
888 {
889 /* XXX not yet implemented, but pretty trivial */
890 return EPASSTHROUGH;
891 }
892
893 void
gsp_write(volatile struct gspregs * gsp,u_short * ptr,size_t size)894 gsp_write(volatile struct gspregs *gsp, u_short *ptr, size_t size)
895 {
896 u_short put, new_put, next, oc;
897 u_long put_hi, oa;
898 size_t n;
899
900 if (size == 0 || size > 8)
901 return;
902
903 n = size;
904
905 oc = gsp->ctrl;
906 oa = GSPGETHADRS(gsp);
907
908 gsp->ctrl = (oc & ~INCR) | LBL | INCW;
909 GSPSETHADRS(gsp, GSP_MODE_ADRS);
910 gsp->data &= ~GMODE_FLUSH;
911
912 GSPSETHADRS(gsp, PUT_HI_PTR_ADRS);
913 put_hi = gsp->data << 16;
914
915 GSPSETHADRS(gsp, PUT_PTR_ADRS);
916 put = gsp->data;
917 new_put = put + (8<<4);
918
919 GSPSETHADRS(gsp, GET_PTR_ADRS);
920 next = gsp->data;
921
922 while (next == new_put) {
923 /*
924 * we should use an intr. here. unfortunately, we already
925 * are called from an interrupt and can't use tsleep.
926 * so we do busy waiting, at least for the moment.
927 */
928
929 GSPSETHADRS(gsp,GET_PTR_ADRS);
930 next = gsp->data;
931 }
932
933 GSPSETHADRS(gsp,put|put_hi);
934 gsp->data = *ptr++ | 8<<4;
935 while ( --n > 0) {
936 gsp->data = *ptr++;
937 }
938
939 GSPSETHADRS(gsp,PUT_PTR_ADRS);
940 gsp->data = new_put;
941 GSPSETHADRS(gsp,oa);
942 gsp->ctrl = oc;
943
944 return;
945 }
946
947 #endif /* NGRF */
948