xref: /netbsd-src/sys/arch/amiga/amiga/vectors.s (revision 9b6bd2d968e3623e57a9a376b7fc0ae125709789)
1/*	$NetBSD: vectors.s,v 1.18 2011/02/08 20:20:08 rmind Exp $	*/
2
3/*
4 * Copyright (c) 1988 University of Utah
5 * Copyright (c) 1990 Regents of the University of California.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of the University nor the names of its contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 *	@(#)vectors.s	7.2 (Berkeley) 5/7/91
33 */
34
35	.data
36
37GLOBAL(vectab)
38	.long	0x4ef80400	/* 0: jmp 0x400:w (unused reset SSP) */
39	.long	0		/* 1: NOT USED (reset PC) */
40	VECTOR(buserr)		/* 2: bus error */
41	VECTOR(addrerr)		/* 3: address error */
42	VECTOR(illinst)		/* 4: illegal instruction */
43	VECTOR(zerodiv)		/* 5: zero divide */
44	VECTOR(chkinst)		/* 6: CHK instruction */
45	VECTOR(trapvinst)	/* 7: TRAPV instruction */
46	VECTOR(privinst)	/* 8: privilege violation */
47	VECTOR(trace)		/* 9: trace */
48	VECTOR(illinst)		/* 10: line 1010 emulator */
49	VECTOR(fpfline)		/* 11: line 1111 emulator */
50	VECTOR(badtrap)		/* 12: unassigned, reserved */
51	VECTOR(coperr)		/* 13: coprocessor protocol violation */
52	VECTOR(fmterr)		/* 14: format error */
53	VECTOR(badtrap)		/* 15: uninitialized interrupt vector */
54	VECTOR(badtrap)		/* 16: unassigned, reserved */
55	VECTOR(badtrap)		/* 17: unassigned, reserved */
56	VECTOR(badtrap)		/* 18: unassigned, reserved */
57	VECTOR(badtrap)		/* 19: unassigned, reserved */
58	VECTOR(badtrap)		/* 20: unassigned, reserved */
59	VECTOR(badtrap)		/* 21: unassigned, reserved */
60	VECTOR(badtrap)		/* 22: unassigned, reserved */
61	VECTOR(badtrap)		/* 23: unassigned, reserved */
62	VECTOR(spurintr)	/* 24: spurious interrupt */
63	VECTOR(lev1intr)	/* 25: level 1 interrupt autovector */
64	VECTOR(lev2intr)	/* 26: level 2 interrupt autovector */
65	VECTOR(lev3intr)	/* 27: level 3 interrupt autovector */
66	VECTOR(lev4intr)	/* 28: level 4 interrupt autovector */
67	VECTOR(lev5intr)	/* 29: level 5 interrupt autovector */
68	VECTOR(lev6intr)	/* 30: level 6 interrupt autovector */
69	VECTOR(lev7intr)	/* 31: level 7 interrupt autovector */
70	VECTOR(trap0)		/* 32: syscalls */
71#ifdef COMPAT_13
72	VECTOR(trap1)		/* 33: compat_13_sigreturn */
73#else
74	VECTOR(illinst)
75#endif
76	VECTOR(trap2)		/* 34: trace */
77#ifdef COMPAT_16
78	VECTOR(trap3)		/* 35: compat_16_sigreturn */
79#else
80	VECTOR(illinst)
81#endif
82	VECTOR(illinst)		/* 36: TRAP instruction vector */
83	VECTOR(illinst)		/* 37: TRAP instruction vector */
84	VECTOR(illinst)		/* 38: TRAP instruction vector */
85	VECTOR(illinst)		/* 39: TRAP instruction vector */
86	VECTOR(illinst)		/* 40: TRAP instruction vector */
87	VECTOR(illinst)		/* 41: TRAP instruction vector */
88	VECTOR(illinst)		/* 42: TRAP instruction vector */
89	VECTOR(illinst)		/* 43: TRAP instruction vector */
90	VECTOR(trap12)		/* 44: TRAP instruction vector */
91	VECTOR(illinst)		/* 45: TRAP instruction vector */
92	VECTOR(illinst)		/* 46: TRAP instruction vector */
93	VECTOR(trap15)		/* 47: TRAP instruction vector */
94#ifdef FPSP
95	ASVECTOR(bsun)		/* 48: FPCP branch/set on unordered cond */
96	ASVECTOR(inex)		/* 49: FPCP inexact result */
97	ASVECTOR(dz)		/* 50: FPCP divide by zero */
98	ASVECTOR(unfl)		/* 51: FPCP underflow */
99	ASVECTOR(operr)		/* 52: FPCP operand error */
100	ASVECTOR(ovfl)		/* 53: FPCP overflow */
101	ASVECTOR(snan)		/* 54: FPCP signalling NAN */
102#else
103	VECTOR(fpfault)		/* 48: FPCP branch/set on unordered cond */
104	VECTOR(fpfault)		/* 49: FPCP inexact result */
105	VECTOR(fpfault)		/* 50: FPCP divide by zero */
106	VECTOR(fpfault)		/* 51: FPCP underflow */
107	VECTOR(fpfault)		/* 52: FPCP operand error */
108	VECTOR(fpfault)		/* 53: FPCP overflow */
109	VECTOR(fpfault)		/* 54: FPCP signalling NAN */
110#endif
111
112
113	VECTOR(fpunsupp)	/* 55: FPCP unimplemented data type */
114	VECTOR(badtrap)		/* 56: unassigned, reserved */
115	VECTOR(badtrap)		/* 57: unassigned, reserved */
116	VECTOR(badtrap)		/* 58: unassigned, reserved */
117	VECTOR(badtrap)		/* 59: unassigned, reserved */
118	VECTOR(badtrap)		/* 60: unassigned, reserved */
119	VECTOR(badtrap)		/* 61: unassigned, reserved */
120	VECTOR(badtrap)		/* 62: unassigned, reserved */
121	VECTOR(badtrap)		/* 63: unassigned, reserved */
122
123#define BADTRAP16	VECTOR(badtrap) ; VECTOR(badtrap) ; \
124			VECTOR(badtrap) ; VECTOR(badtrap) ; \
125			VECTOR(badtrap) ; VECTOR(badtrap) ; \
126			VECTOR(badtrap) ; VECTOR(badtrap) ; \
127			VECTOR(badtrap) ; VECTOR(badtrap) ; \
128			VECTOR(badtrap) ; VECTOR(badtrap) ; \
129			VECTOR(badtrap) ; VECTOR(badtrap) ; \
130			VECTOR(badtrap) ; VECTOR(badtrap)
131	BADTRAP16		/* 64-255: user interrupt vectors */
132	BADTRAP16		/* 64-255: user interrupt vectors */
133	BADTRAP16		/* 64-255: user interrupt vectors */
134	BADTRAP16		/* 64-255: user interrupt vectors */
135	BADTRAP16		/* 64-255: user interrupt vectors */
136	BADTRAP16		/* 64-255: user interrupt vectors */
137	BADTRAP16		/* 64-255: user interrupt vectors */
138	BADTRAP16		/* 64-255: user interrupt vectors */
139	BADTRAP16		/* 64-255: user interrupt vectors */
140	BADTRAP16		/* 64-255: user interrupt vectors */
141	BADTRAP16		/* 64-255: user interrupt vectors */
142	BADTRAP16		/* 64-255: user interrupt vectors */
143