1.\" $NetBSD: portfeatures.9,v 1.3 2023/03/06 12:25:06 thorpej Exp $ 2.\" 3.\" Copyright (c) The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 15.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20.\" BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21.\" LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22.\" AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23.\" OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25.\" SUCH DAMAGE. 26.Dd March 6, 2023 27.Dt PORTFEATURES 9 28.Os 29. 30.Sh NAME 31.Nm portfeatures 32.Nd the __HAVEs (\|and the have nots\|) 33. 34.Sh DESCRIPTION 35Machine-independent kernel code adapts to differences in hardware 36capabilities provided by the machine-dependent parts of the kernel. 37A port declares its capabilities by defining various 38.Li __HAVE_ Ns Ar feature 39macros. 40This manual page provides an index of such macros with pointers to 41other manual pages in the kernel section that provide all the relevant 42details. 43.Bl -tag -width Dv 44. 45.\" --------- 46.It Dv __HAVE_MUTEX_STUBS Pq Xr mutex 9 47The port provides fast path mutex enter and exit stubs. 48. 49.\" --------- 50.It Dv __HAVE_PREEMPTION Pq Xr cpu_need_resched 9 51The port can preempt kernel lwps with 52.Dv RESCHED_KPREEMPT . 53. 54.\" --------- 55.It Dv __HAVE_PTRACE_MACHDEP 56The port has MD 57.Xr ptrace 2 58requests, defines 59.Dv PTRACE_MACHDEP_REQUEST_CASES 60macro with 61.Ic case 62labels for its MD requests. 63. 64.\" --------- 65.It Dv __HAVE_RAS Pq Xr ras 9 66The port supports restartable atomic sequences. 67. 68.\" --------- 69.It Dv __HAVE_SIMPLE_MUTEXES Pq Xr mutex 9 70The port provides a CAS function that is either MP-safe, or does not 71need to be MP safe. 72Adaptive mutexes on these architectures do not require an additional 73interlock. 74. 75.\" --------- 76.It Dv __HAVE_SPIN_MUTEX_STUBS Pq Xr mutex 9 77The port provides fast path enter and exit stubs for spin mutexes. 78. 79.\" --------- 80.It Dv __HAVE_UCAS_FULL Pq Xr ucas 9 81The port provides a full implementation of the low-level primitives 82required for atomic compare-and-swap operations to user-space addresses. 83. 84.\" --------- 85.It Dv __HAVE_UCAS_MP Pq Xr ucas 9 86The port does not provide a full implementation of the low-level 87primitives required for atomic compare-and-swap operations to user-space 88addresses, but does provide an implementation of those primitives that 89can be used if 90.Pq and only if 91the system has more than one processor. 92.El 93