1.\" $NetBSD: mca.9,v 1.12 2017/07/03 21:28:48 wiz Exp $ 2.\" 3.\" Copyright (c) 2001 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Gregory McGarry. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGE. 29.\" 30.Dd October 7, 2001 31.Dt MCA 9 32.Os 33.Sh NAME 34.Nm MCA , 35.Nm mca_intr_establish , 36.Nm mca_intr_disestablish , 37.Nm mca_intr_evcnt , 38.Nm mca_conf_read , 39.Nm mca_conf_write 40.Nd MicroChannel Architecture bus 41.Sh SYNOPSIS 42.In sys/bus.h 43.In dev/mca/mcavar.h 44.In dev/mca/mcadevs.h 45.Ft void * 46.Fn mca_intr_establish "mca_chipset_tag_t mc" "mca_intr_handle_t hdl" \ 47"int level" "int (*handler)(void *)" "void *arg" 48.Ft void 49.Fn mca_intr_disestablish "mca_chipset_tag_t mc" "mca_intr_handle_t hdl" 50.Ft const struct evcnt * 51.Fn mca_intr_evcnt "mca_chipset_tag_t mc" "mca_intr_handle_t hdl" 52.Ft int 53.Fn mca_conf_read "mca_chipset_tag_t mc" "int slot" "int reg" 54.Ft void 55.Fn mca_conf_write "mca_chipset_tag_t mc" "int slot" "int reg" \ 56"int data" 57.Sh DESCRIPTION 58The 59.Nm 60device provides support for IBM's MicroChannel Architecture bus found 61on IBM PS/2 systems and selected workstations. 62It was designed as a replacement bus for the ISA bus found on IBM's 63older machines. 64However, the bus specifications were only available under license, so 65MCA did not achieve widespread acceptance in the industry. 66.Pp 67Being a replacement for the ISA bus, the MCA bus does share some 68similar aspects with the ISA bus. 69Some MCA devices can be detected via the usual ISA-style probing. 70However, most device detection is done through the Programmable Option 71Select (POS) registers. 72These registers provide a window into a device to determine device-specific 73properties and configuration. 74The configuration of devices and their POS registers is performed using 75IBM's system configuration software. 76.Pp 77The MCA bus uses level-triggered interrupts while the ISA bus uses 78edge-triggered interrupts. 79Level triggered interrupts have the advantage that they can be shared 80among multiple device. 81Therefore, most MCA-specific devices should be coded with shared 82interrupts in mind. 83.Sh DATA TYPES 84Drivers for devices attached to the MCA bus will make use of the 85following data types: 86.Bl -tag -width compact 87.It Fa mca_chipset_tag_t 88Chipset tag for the MCA bus. 89.It Fa mca_intr_handle_t 90The opaque handle describing an established interrupt handler. 91.It Fa struct mca_attach_args 92A structure use to inform the driver of MCA bus properties. 93It contains the following members: 94.Bd -literal 95 bus_space_tag_t ma_iot; /* MCA I/O space tag */ 96 bus_space_tag_t ma_memt; /* MCA mem space tag */ 97 bus_dma_tag_t ma_dmat; /* MCA DMA tag */ 98 int ma_slot; /* MCA slot number */ 99 int ma_pos[8]; /* MCA POS values */ 100 int ma_id; /* MCA device */ 101.Ed 102.El 103.Sh FUNCTIONS 104.Bl -tag -width compact 105.It Fn mca_intr_establish "mc" "hdl" "level" "handler" "arg" 106Establish a MCA interrupt handler on the MCA bus specified by 107.Fa mc 108for the interrupt described completely by 109.Fa hdl . 110The priority of the interrupt is specified by 111.Fa level . 112When the interrupt occurs the function 113.Fa handler 114is called with argument 115.Fa arg . 116.It Fn mca_intr_disestablish "mc" "hdl" 117Dis-establish the interrupt handler on the MCA bus specified by 118.Fa mc 119for the interrupt described completely 120.Fa hdl . 121.It Fn mca_intr_evcnt "mc" "hdl" 122Do interrupt event counting on the MCA bus specified by 123.Fa mc 124for the event described completely by 125.Fa hdl . 126.It Fn mca_conf_read "mc" "slot" "reg" 127Read the POS register 128.Fa reg 129for the device in slot 130.Fa slot 131on the MCA bus specified by 132.Fa mc . 133.It Fn mca_conf_write "mc" "slot" "reg" "data" 134Write data 135.Fa data 136to the POS register 137.Fa reg 138for the device in slot 139.Fa slot 140on the MCA bus specified by 141.Fa mc . 142.El 143.Sh AUTOCONFIGURATION 144The MCA bus is a direct-connection bus. 145During autoconfiguration, the parent specifies the MCA device ID for the 146found device in the 147.Fa ma_id 148member of the 149.Em mca_attach_args 150structure. 151Drivers should match on the device ID. 152Device capabilities and configuration information should be read from 153device POS registers using 154.Fn mca_conf_read . 155Some important configuration information found in the POS registers 156include the I/O base address, memory base address and interrupt 157number. 158The location of these configurable options with the POS registers are 159device specific. 160.Sh DMA SUPPORT 161The MCA bus supports 32-bit, bidirectional DMA transfers. 162Currently, no machine-independent support for MCA DMA is available. 163.Sh CODE REFERENCES 164The MCA subsystem itself is implemented within the file 165.Pa sys/dev/mca/mca_subr.c . 166Machine-dependent portions can be found in 167.Pa sys/arch/<arch>/mca/mca_machdep.c . 168The database of known devices exists within the file 169.Pa sys/dev/mca/mcadevs_data.h 170and is generated automatically from the file 171.Pa sys/dev/mca/mcadevs . 172New vendor and product identifiers should be added to this file. 173The database can be regenerated using the Makefile 174.Pa sys/dev/mca/Makefile.mcadevs . 175.Pp 176A good source of information about MCA devices is IBM's system 177configuration disk. 178The disk contains .adf files which describe the location of device 179configuration options in the POS registers. 180.Sh SEE ALSO 181.Xr mca 4 , 182.Xr autoconf 9 , 183.Xr bus_dma 9 , 184.Xr bus_space 9 , 185.Xr driver 9 , 186.Xr isa 9 187.Sh BUGS 188The machine-independent 189.Nm 190driver does not currently support DMA. 191MCA devices which require DMA operation currently access the DMA 192capabilities directly. 193