1.\" $NetBSD: nct.4,v 1.3 2020/12/21 11:30:59 nia Exp $ 2.\" 3.\" Copyright (c) 2019 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Andrew Doran. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGE. 29.\" 30.Dd December 21, 2020 31.Dt NCT 4 32.Os 33.Sh NAME 34.Nm nct 35.Nd Nuvoton NCT5104D SuperIO driver 36.Sh SYNOPSIS 37.Cd "nct0 at isa? port ?" 38.Cd "nct0 at isa? port 0x2e" 39.Cd "nct0 at isa? port 0x4e" 40.Cd "gpio* at nct?" 41.Sh DESCRIPTION 42The 43.Nm 44driver supports the GPIO functions of the NCT5104D. 45The driver does not support the watchdog function of the chip. 46The chip's UARTs are driven by the 47.Xr com 4 48driver. 49.Pp 50The probe routine for this device is invasive. 51The chip will be probed for only if the device is configured into the kernel 52with a fixed port number (0x2e or 0x4e), or if running on a system that 53is known to have a NCT5104D, such as the PC Engines APU line of systems. 54.Pp 55GPIO pins on this chip are shared with the 3rd UART, 4th UART, a clock 56input line, and the watchdog timer. 57If any these functions have been enabled by the BIOS, the 58.Nm 59driver will not take control of the corresponding GPIO lines. 60At attach time, the driver logs which of the 17 GPIO lines are enabled. 61.Sh SEE ALSO 62.Xr gpio 4 , 63.Xr isa 4 , 64.Xr gpioctl 8 65.Sh HISTORY 66The 67.Nm 68driver first appeared in 69.Nx 10 . 70.Sh CAVEATS 71If the chip has not been configured in a complete and accurate manner by 72the BIOS, GPIO lines may be needlessly disabled. 73