1.\" $NetBSD: memc.4,v 1.6 2017/02/17 22:24:47 christos Exp $ 2.\" 3.\" Copyright (c) 2001 The NetBSD Foundation, Inc. 4.\" All rights reserved. 5.\" 6.\" This code is derived from software contributed to The NetBSD Foundation 7.\" by Steve C. Woodford. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28.\" POSSIBILITY OF SUCH DAMAGE. 29.\" 30.Dd February 17, 2017 31.Dt MEMC 4 mvme68k 32.Os 33.Sh NAME 34.Nm memc 35.Nd MVME162-MVME177 Memory Controller Chip 36.Sh SYNOPSIS 37.Cd "memc* at mainbus0" 38.Sh DESCRIPTION 39The 40.Nm 41devices are used on MVME162, MVME167, MVME172 and MVME177 boards 42to manage one or more DRAM modules. 43.Pp 44Depending on the type of DRAM module fitted, the device will 45either be a MEMC040 device or an MCECC device. The former manages 46a Parity DRAM module while the latter manages an ECC DRAM module. 47.Sh DIAGNOSTICS 48.Bl -diag -compact 49.It memc0 at mainbus0. 50This is the normal autoconfiguration message indicating that the 51Memory Controller Chip has been found and attached to the main processor 52bus. 53.It memc0: Correctable error on CPU read access to 0x12345678. 54This indicates that an MCECC memory controller detected and corrected 55a single bit error in one of the DRAM banks. There are a few variations 56on the message where "CPU" can be replaced with "Peripheral Device" 57or "Scrubber", and "read" can be substituted for "write". 58This message is followed by some more details which can help pin-point 59the error... 60.It memc0: ECC Syndrome 0x23 (DRAM Bank C, Bit#16). 61Pin-points exactly where the error occurred. 62.It memc0: Uncorrectable error on CPU read access to 0x12345678. 63Errors like this have the potential to corrupt data. As such, it is 64likely the system will panic very soon afterwards. 65.El 66.Sh SEE ALSO 67.Xr mvme68k/mainbus 4 68.Sh BUGS 69The 70.Nm 71driver does not yet fully support the MEMC040 (Parity) version 72of the device. 73