1.\" $NetBSD: ds28e17iic.4,v 1.1 2025/01/23 19:02:42 brad Exp $ 2.\" 3.\" Copyright (c) 2025 Brad Spencer <brad@anduin.eldar.org> 4.\" 5.\" Permission to use, copy, modify, and distribute this software for any 6.\" purpose with or without fee is hereby granted, provided that the above 7.\" copyright notice and this permission notice appear in all copies. 8.\" 9.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16.\" 17.Dd January 12, 2025 18.Dt DS28E17IIC 4 19.Os 20.Sh NAME 21.Nm ds28e17iic 22.Nd Driver for Maxim DS28E17 1-Wire to I2C bridge 23.Sh SYNOPSIS 24.Cd "ds28e17iic* at onewire?" 25.Sh DESCRIPTION 26The 27.Nm 28driver provides a 1-Wire to I2C bridge with a 29.Xr iic 4 30bus at the far end using the DS28E17 bridge chip. 31.Pp 32The DS28E17 will automatically detect and deal with a end device that 33uses I2C clock stretching. 34.Sh SYSCTL VARIABLES 35The following 36.Xr sysctl 3 37variables are provided: 38.Bl -tag -width indent 39.It Li hw.ds28e17iic0.readycount 40.It Li hw.ds28e17iic0.readydelay 41When the driver sends a transaction down the 1-Wire bus, these 42variables are how long to delay before reading the status on whether 43or not the conversion is done and the number of times to perform this 44read back. In general, these values should be as short as possible, 45but if there are too short, a EAGAIN timeout will occur when the end 46device is just taking a longer than expect amount of time to respond. 47This may be particularly noticed if end device is doing clock 48stretching. 49.It Li hw.ds28e17iic0.reportreadnostop 50If set to 1, report that an attempt to do a Read without a Stop 51occured. The chip does not support that operation. Read without Stop 52will be treated as a Read with a Stop with the hope that the end 53device will be able to deal with that. 54.It Li hw.ds28e17iic0.reportzerolen 55If set to 1, report that an attempt to perform a zero length read or 56zero length write occured. The chip does not support zero length 57reads or writes. 58.It Li hw.ds28e17iic0.debug 59If the driver is compiled with 60.Dv DS28E17IIC_DEBUG , 61this node will appear and can be used to set the debugging level. 62.El 63.Sh SEE ALSO 64.Xr onewire 4 , 65.Xr iic 4 , 66.Xr sysctl 8 67.Sh HISTORY 68The 69.Nm 70driver first appeared in 71.Nx 11.0 . 72.Sh AUTHORS 73.An -nosplit 74The 75.Nm 76driver was written by 77.An Brad Spencer Aq Mt brad@anduin.eldar.org . 78.Sh BUGS 79While this may not be considered a bug, the DS28E17 chip will detach 80itself from the 81.Xr onewire 4 82bus if there is not a device connected to its SDA and SCL pins. 83.Pp 84The 85.Xr i2cscan 8 86command will not function entirely correctly when run against a 87DS28E17 chip. The default mode of doing a I2C Write with Stop that is 88zero length is not supported by the DS28E17 chip. When the 89.Xr i2cscan 8 90command is used with its one byte read mode it will find devices as 91long as the device does not NACK on a I2C read. 92 93