1.\" $NetBSD: artsata.4,v 1.5 2009/10/19 18:41:08 bouyer Exp $ 2.\" 3.\" Copyright (c) 2003 Manuel Bouyer. 4.\" 5.\" Redistribution and use in source and binary forms, with or without 6.\" modification, are permitted provided that the following conditions 7.\" are met: 8.\" 1. Redistributions of source code must retain the above copyright 9.\" notice, this list of conditions and the following disclaimer. 10.\" 2. Redistributions in binary form must reproduce the above copyright 11.\" notice, this list of conditions and the following disclaimer in the 12.\" documentation and/or other materials provided with the distribution. 13.\" 14.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22.\" INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24.\" 25.Dd February 12, 2005 26.Dt ARTSATA 4 27.Os 28.Sh NAME 29.Nm artsata 30.Nd Intel i31244 Serial ATA disk controller driver 31.Sh SYNOPSIS 32.Cd "artsata* at pci? dev ? function ? flags 0x0000" 33.Cd "options PCIIDE_I31244_DISABLEDMA" 34.Sh DESCRIPTION 35The 36.Nm 37driver supports the Intel i31244 Serial ATA and controllers, 38and provides the interface with the hardware for the 39.Xr ata 4 40driver. 41.Pp 42The 0x0002 flag forces the 43.Nm 44driver to disable DMA on chipsets for which DMA would normally be 45enabled. 46This can be used as a debugging aid, or to work around 47problems where the SATA controller is wired up to the system incorrectly. 48.Sh SEE ALSO 49.Xr ata 4 , 50.Xr atapi 4 , 51.Xr intro 4 , 52.Xr pci 4 , 53.Xr pciide 4 , 54.Xr wd 4 , 55.Xr wdc 4 56.Sh BUGS 57Early samples of the Intel i31244 Serial ATA controller revision 0 had a 58bug affecting DMA data transfers. 59Full production samples have been fixed, but have the same revision number. 60The 61.Dv PCIIDE_I31244_DISABLEDMA 62option can be used to disable DMA on the buggy revisions. 63