1 /* gdb-if.c -- sim interface to GDB. 2 3 Copyright (C) 2008-2024 Free Software Foundation, Inc. 4 Contributed by Red Hat, Inc. 5 6 This file is part of the GNU simulators. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21 /* This must come before any other includes. */ 22 #include "defs.h" 23 24 #include <stdio.h> 25 #include <assert.h> 26 #include <signal.h> 27 #include <string.h> 28 #include <ctype.h> 29 #include <stdlib.h> 30 31 #include "ansidecl.h" 32 #include "bfd.h" 33 #include "libiberty.h" 34 #include "sim/callback.h" 35 #include "sim/sim.h" 36 #include "gdb/signals.h" 37 #include "sim/sim-rx.h" 38 39 #include "cpu.h" 40 #include "mem.h" 41 #include "load.h" 42 #include "syscalls.h" 43 #include "err.h" 44 #include "trace.h" 45 46 /* Ideally, we'd wrap up all the minisim's data structures in an 47 object and pass that around. However, neither GDB nor run needs 48 that ability. 49 50 So we just have one instance, that lives in global variables, and 51 each time we open it, we re-initialize it. */ 52 struct sim_state 53 { 54 const char *message; 55 }; 56 57 static struct sim_state the_minisim = { 58 "This is the sole rx minisim instance. See libsim.a's global variables." 59 }; 60 61 static int rx_sim_is_open; 62 63 SIM_DESC 64 sim_open (SIM_OPEN_KIND kind, 65 struct host_callback_struct *callback, 66 struct bfd *abfd, char * const *argv) 67 { 68 if (rx_sim_is_open) 69 fprintf (stderr, "rx minisim: re-opened sim\n"); 70 71 /* The 'run' interface doesn't use this function, so we don't care 72 about KIND; it's always SIM_OPEN_DEBUG. */ 73 if (kind != SIM_OPEN_DEBUG) 74 fprintf (stderr, "rx minisim: sim_open KIND != SIM_OPEN_DEBUG: %d\n", 75 kind); 76 77 set_callbacks (callback); 78 79 /* We don't expect any command-line arguments. */ 80 81 init_mem (); 82 init_regs (); 83 execution_error_init_debugger (); 84 85 sim_disasm_init (abfd); 86 rx_sim_is_open = 1; 87 return &the_minisim; 88 } 89 90 static void 91 check_desc (SIM_DESC sd) 92 { 93 if (sd != &the_minisim) 94 fprintf (stderr, "rx minisim: desc != &the_minisim\n"); 95 } 96 97 void 98 sim_close (SIM_DESC sd, int quitting) 99 { 100 check_desc (sd); 101 102 /* Not much to do. At least free up our memory. */ 103 init_mem (); 104 105 rx_sim_is_open = 0; 106 } 107 108 static bfd * 109 open_objfile (const char *filename) 110 { 111 bfd *prog = bfd_openr (filename, 0); 112 113 if (!prog) 114 { 115 fprintf (stderr, "Can't read %s\n", filename); 116 return 0; 117 } 118 119 if (!bfd_check_format (prog, bfd_object)) 120 { 121 fprintf (stderr, "%s not a rx program\n", filename); 122 return 0; 123 } 124 125 return prog; 126 } 127 128 static struct swap_list 129 { 130 bfd_vma start, end; 131 struct swap_list *next; 132 } *swap_list = NULL; 133 134 static void 135 free_swap_list (void) 136 { 137 while (swap_list) 138 { 139 struct swap_list *next = swap_list->next; 140 free (swap_list); 141 swap_list = next; 142 } 143 } 144 145 /* When running in big endian mode, we must do an additional 146 byte swap of memory areas used to hold instructions. See 147 the comment preceding rx_load in load.c to see why this is 148 so. 149 150 Construct a list of memory areas that must be byte swapped. 151 This list will be consulted when either reading or writing 152 memory. */ 153 154 static void 155 build_swap_list (struct bfd *abfd) 156 { 157 asection *s; 158 free_swap_list (); 159 160 /* Nothing to do when in little endian mode. */ 161 if (!rx_big_endian) 162 return; 163 164 for (s = abfd->sections; s; s = s->next) 165 { 166 if ((s->flags & SEC_LOAD) && (s->flags & SEC_CODE)) 167 { 168 struct swap_list *sl; 169 bfd_size_type size; 170 171 size = bfd_section_size (s); 172 if (size <= 0) 173 continue; 174 175 sl = malloc (sizeof (struct swap_list)); 176 assert (sl != NULL); 177 sl->next = swap_list; 178 sl->start = bfd_section_lma (s); 179 sl->end = sl->start + size; 180 swap_list = sl; 181 } 182 } 183 } 184 185 static int 186 addr_in_swap_list (bfd_vma addr) 187 { 188 struct swap_list *s; 189 190 for (s = swap_list; s; s = s->next) 191 { 192 if (s->start <= addr && addr < s->end) 193 return 1; 194 } 195 return 0; 196 } 197 198 SIM_RC 199 sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty) 200 { 201 check_desc (sd); 202 203 if (!abfd) 204 abfd = open_objfile (prog); 205 if (!abfd) 206 return SIM_RC_FAIL; 207 208 rx_load (abfd, get_callbacks ()); 209 build_swap_list (abfd); 210 211 return SIM_RC_OK; 212 } 213 214 SIM_RC 215 sim_create_inferior (SIM_DESC sd, struct bfd *abfd, 216 char * const *argv, char * const *env) 217 { 218 check_desc (sd); 219 220 if (abfd) 221 { 222 rx_load (abfd, NULL); 223 build_swap_list (abfd); 224 } 225 226 return SIM_RC_OK; 227 } 228 229 uint64_t 230 sim_read (SIM_DESC sd, uint64_t addr, void *buffer, uint64_t length) 231 { 232 int i; 233 unsigned char *data = buffer; 234 235 check_desc (sd); 236 237 if (addr == 0) 238 return 0; 239 240 execution_error_clear_last_error (); 241 242 for (i = 0; i < length; i++) 243 { 244 bfd_vma vma = addr + i; 245 int do_swap = addr_in_swap_list (vma); 246 data[i] = mem_get_qi (vma ^ (do_swap ? 3 : 0)); 247 248 if (execution_error_get_last_error () != SIM_ERR_NONE) 249 return i; 250 } 251 252 return length; 253 } 254 255 uint64_t 256 sim_write (SIM_DESC sd, uint64_t addr, const void *buffer, uint64_t length) 257 { 258 int i; 259 const unsigned char *data = buffer; 260 261 check_desc (sd); 262 263 execution_error_clear_last_error (); 264 265 for (i = 0; i < length; i++) 266 { 267 bfd_vma vma = addr + i; 268 int do_swap = addr_in_swap_list (vma); 269 mem_put_qi (vma ^ (do_swap ? 3 : 0), data[i]); 270 271 if (execution_error_get_last_error () != SIM_ERR_NONE) 272 return i; 273 } 274 275 return length; 276 } 277 278 /* Read the LENGTH bytes at BUF as an little-endian value. */ 279 static DI 280 get_le (const unsigned char *buf, int length) 281 { 282 DI acc = 0; 283 while (--length >= 0) 284 acc = (acc << 8) + buf[length]; 285 286 return acc; 287 } 288 289 /* Read the LENGTH bytes at BUF as a big-endian value. */ 290 static DI 291 get_be (const unsigned char *buf, int length) 292 { 293 DI acc = 0; 294 while (length-- > 0) 295 acc = (acc << 8) + *buf++; 296 297 return acc; 298 } 299 300 /* Store VAL as a little-endian value in the LENGTH bytes at BUF. */ 301 static void 302 put_le (unsigned char *buf, int length, DI val) 303 { 304 int i; 305 306 for (i = 0; i < length; i++) 307 { 308 buf[i] = val & 0xff; 309 val >>= 8; 310 } 311 } 312 313 /* Store VAL as a big-endian value in the LENGTH bytes at BUF. */ 314 static void 315 put_be (unsigned char *buf, int length, DI val) 316 { 317 int i; 318 319 for (i = length-1; i >= 0; i--) 320 { 321 buf[i] = val & 0xff; 322 val >>= 8; 323 } 324 } 325 326 327 static int 328 check_regno (enum sim_rx_regnum regno) 329 { 330 return 0 <= regno && regno < sim_rx_num_regs; 331 } 332 333 static size_t 334 reg_size (enum sim_rx_regnum regno) 335 { 336 size_t size; 337 338 switch (regno) 339 { 340 case sim_rx_r0_regnum: 341 size = sizeof (regs.r[0]); 342 break; 343 case sim_rx_r1_regnum: 344 size = sizeof (regs.r[1]); 345 break; 346 case sim_rx_r2_regnum: 347 size = sizeof (regs.r[2]); 348 break; 349 case sim_rx_r3_regnum: 350 size = sizeof (regs.r[3]); 351 break; 352 case sim_rx_r4_regnum: 353 size = sizeof (regs.r[4]); 354 break; 355 case sim_rx_r5_regnum: 356 size = sizeof (regs.r[5]); 357 break; 358 case sim_rx_r6_regnum: 359 size = sizeof (regs.r[6]); 360 break; 361 case sim_rx_r7_regnum: 362 size = sizeof (regs.r[7]); 363 break; 364 case sim_rx_r8_regnum: 365 size = sizeof (regs.r[8]); 366 break; 367 case sim_rx_r9_regnum: 368 size = sizeof (regs.r[9]); 369 break; 370 case sim_rx_r10_regnum: 371 size = sizeof (regs.r[10]); 372 break; 373 case sim_rx_r11_regnum: 374 size = sizeof (regs.r[11]); 375 break; 376 case sim_rx_r12_regnum: 377 size = sizeof (regs.r[12]); 378 break; 379 case sim_rx_r13_regnum: 380 size = sizeof (regs.r[13]); 381 break; 382 case sim_rx_r14_regnum: 383 size = sizeof (regs.r[14]); 384 break; 385 case sim_rx_r15_regnum: 386 size = sizeof (regs.r[15]); 387 break; 388 case sim_rx_isp_regnum: 389 size = sizeof (regs.r_isp); 390 break; 391 case sim_rx_usp_regnum: 392 size = sizeof (regs.r_usp); 393 break; 394 case sim_rx_intb_regnum: 395 size = sizeof (regs.r_intb); 396 break; 397 case sim_rx_pc_regnum: 398 size = sizeof (regs.r_pc); 399 break; 400 case sim_rx_ps_regnum: 401 size = sizeof (regs.r_psw); 402 break; 403 case sim_rx_bpc_regnum: 404 size = sizeof (regs.r_bpc); 405 break; 406 case sim_rx_bpsw_regnum: 407 size = sizeof (regs.r_bpsw); 408 break; 409 case sim_rx_fintv_regnum: 410 size = sizeof (regs.r_fintv); 411 break; 412 case sim_rx_fpsw_regnum: 413 size = sizeof (regs.r_fpsw); 414 break; 415 case sim_rx_acc_regnum: 416 size = sizeof (regs.r_acc); 417 break; 418 default: 419 size = 0; 420 break; 421 } 422 return size; 423 } 424 425 int 426 sim_fetch_register (SIM_DESC sd, int regno, void *buf, int length) 427 { 428 size_t size; 429 DI val; 430 431 check_desc (sd); 432 433 if (!check_regno (regno)) 434 return 0; 435 436 size = reg_size (regno); 437 438 if (length != size) 439 return 0; 440 441 switch (regno) 442 { 443 case sim_rx_r0_regnum: 444 val = get_reg (0); 445 break; 446 case sim_rx_r1_regnum: 447 val = get_reg (1); 448 break; 449 case sim_rx_r2_regnum: 450 val = get_reg (2); 451 break; 452 case sim_rx_r3_regnum: 453 val = get_reg (3); 454 break; 455 case sim_rx_r4_regnum: 456 val = get_reg (4); 457 break; 458 case sim_rx_r5_regnum: 459 val = get_reg (5); 460 break; 461 case sim_rx_r6_regnum: 462 val = get_reg (6); 463 break; 464 case sim_rx_r7_regnum: 465 val = get_reg (7); 466 break; 467 case sim_rx_r8_regnum: 468 val = get_reg (8); 469 break; 470 case sim_rx_r9_regnum: 471 val = get_reg (9); 472 break; 473 case sim_rx_r10_regnum: 474 val = get_reg (10); 475 break; 476 case sim_rx_r11_regnum: 477 val = get_reg (11); 478 break; 479 case sim_rx_r12_regnum: 480 val = get_reg (12); 481 break; 482 case sim_rx_r13_regnum: 483 val = get_reg (13); 484 break; 485 case sim_rx_r14_regnum: 486 val = get_reg (14); 487 break; 488 case sim_rx_r15_regnum: 489 val = get_reg (15); 490 break; 491 case sim_rx_isp_regnum: 492 val = get_reg (isp); 493 break; 494 case sim_rx_usp_regnum: 495 val = get_reg (usp); 496 break; 497 case sim_rx_intb_regnum: 498 val = get_reg (intb); 499 break; 500 case sim_rx_pc_regnum: 501 val = get_reg (pc); 502 break; 503 case sim_rx_ps_regnum: 504 val = get_reg (psw); 505 break; 506 case sim_rx_bpc_regnum: 507 val = get_reg (bpc); 508 break; 509 case sim_rx_bpsw_regnum: 510 val = get_reg (bpsw); 511 break; 512 case sim_rx_fintv_regnum: 513 val = get_reg (fintv); 514 break; 515 case sim_rx_fpsw_regnum: 516 val = get_reg (fpsw); 517 break; 518 case sim_rx_acc_regnum: 519 val = ((DI) get_reg (acchi) << 32) | get_reg (acclo); 520 break; 521 default: 522 fprintf (stderr, "rx minisim: unrecognized register number: %d\n", 523 regno); 524 return -1; 525 } 526 527 if (rx_big_endian) 528 put_be (buf, length, val); 529 else 530 put_le (buf, length, val); 531 532 return size; 533 } 534 535 int 536 sim_store_register (SIM_DESC sd, int regno, const void *buf, int length) 537 { 538 size_t size; 539 DI val; 540 541 check_desc (sd); 542 543 if (!check_regno (regno)) 544 return -1; 545 546 size = reg_size (regno); 547 548 if (length != size) 549 return -1; 550 551 if (rx_big_endian) 552 val = get_be (buf, length); 553 else 554 val = get_le (buf, length); 555 556 switch (regno) 557 { 558 case sim_rx_r0_regnum: 559 put_reg (0, val); 560 break; 561 case sim_rx_r1_regnum: 562 put_reg (1, val); 563 break; 564 case sim_rx_r2_regnum: 565 put_reg (2, val); 566 break; 567 case sim_rx_r3_regnum: 568 put_reg (3, val); 569 break; 570 case sim_rx_r4_regnum: 571 put_reg (4, val); 572 break; 573 case sim_rx_r5_regnum: 574 put_reg (5, val); 575 break; 576 case sim_rx_r6_regnum: 577 put_reg (6, val); 578 break; 579 case sim_rx_r7_regnum: 580 put_reg (7, val); 581 break; 582 case sim_rx_r8_regnum: 583 put_reg (8, val); 584 break; 585 case sim_rx_r9_regnum: 586 put_reg (9, val); 587 break; 588 case sim_rx_r10_regnum: 589 put_reg (10, val); 590 break; 591 case sim_rx_r11_regnum: 592 put_reg (11, val); 593 break; 594 case sim_rx_r12_regnum: 595 put_reg (12, val); 596 break; 597 case sim_rx_r13_regnum: 598 put_reg (13, val); 599 break; 600 case sim_rx_r14_regnum: 601 put_reg (14, val); 602 break; 603 case sim_rx_r15_regnum: 604 put_reg (15, val); 605 break; 606 case sim_rx_isp_regnum: 607 put_reg (isp, val); 608 break; 609 case sim_rx_usp_regnum: 610 put_reg (usp, val); 611 break; 612 case sim_rx_intb_regnum: 613 put_reg (intb, val); 614 break; 615 case sim_rx_pc_regnum: 616 put_reg (pc, val); 617 break; 618 case sim_rx_ps_regnum: 619 put_reg (psw, val); 620 break; 621 case sim_rx_bpc_regnum: 622 put_reg (bpc, val); 623 break; 624 case sim_rx_bpsw_regnum: 625 put_reg (bpsw, val); 626 break; 627 case sim_rx_fintv_regnum: 628 put_reg (fintv, val); 629 break; 630 case sim_rx_fpsw_regnum: 631 put_reg (fpsw, val); 632 break; 633 case sim_rx_acc_regnum: 634 put_reg (acclo, val & 0xffffffff); 635 put_reg (acchi, (val >> 32) & 0xffffffff); 636 break; 637 default: 638 fprintf (stderr, "rx minisim: unrecognized register number: %d\n", 639 regno); 640 return 0; 641 } 642 643 return size; 644 } 645 646 void 647 sim_info (SIM_DESC sd, bool verbose) 648 { 649 check_desc (sd); 650 651 printf ("The rx minisim doesn't collect any statistics.\n"); 652 } 653 654 static volatile int stop; 655 static enum sim_stop reason; 656 int siggnal; 657 658 659 /* Given a signal number used by the RX bsp (that is, newlib), 660 return a target signal number used by GDB. */ 661 static int 662 rx_signal_to_gdb_signal (int rx) 663 { 664 switch (rx) 665 { 666 case 4: 667 return GDB_SIGNAL_ILL; 668 669 case 5: 670 return GDB_SIGNAL_TRAP; 671 672 case 10: 673 return GDB_SIGNAL_BUS; 674 675 case 11: 676 return GDB_SIGNAL_SEGV; 677 678 case 24: 679 return GDB_SIGNAL_XCPU; 680 681 case 2: 682 return GDB_SIGNAL_INT; 683 684 case 8: 685 return GDB_SIGNAL_FPE; 686 687 case 6: 688 return GDB_SIGNAL_ABRT; 689 } 690 691 return 0; 692 } 693 694 695 /* Take a step return code RC and set up the variables consulted by 696 sim_stop_reason appropriately. */ 697 static void 698 handle_step (int rc) 699 { 700 if (execution_error_get_last_error () != SIM_ERR_NONE) 701 { 702 reason = sim_stopped; 703 siggnal = GDB_SIGNAL_SEGV; 704 } 705 if (RX_STEPPED (rc) || RX_HIT_BREAK (rc)) 706 { 707 reason = sim_stopped; 708 siggnal = GDB_SIGNAL_TRAP; 709 } 710 else if (RX_STOPPED (rc)) 711 { 712 reason = sim_stopped; 713 siggnal = rx_signal_to_gdb_signal (RX_STOP_SIG (rc)); 714 } 715 else 716 { 717 assert (RX_EXITED (rc)); 718 reason = sim_exited; 719 siggnal = RX_EXIT_STATUS (rc); 720 } 721 } 722 723 724 void 725 sim_resume (SIM_DESC sd, int step, int sig_to_deliver) 726 { 727 int rc; 728 729 check_desc (sd); 730 731 if (sig_to_deliver != 0) 732 { 733 fprintf (stderr, 734 "Warning: the rx minisim does not implement " 735 "signal delivery yet.\n" "Resuming with no signal.\n"); 736 } 737 738 execution_error_clear_last_error (); 739 740 if (step) 741 { 742 rc = setjmp (decode_jmp_buf); 743 if (rc == 0) 744 rc = decode_opcode (); 745 handle_step (rc); 746 } 747 else 748 { 749 /* We don't clear 'stop' here, because then we would miss 750 interrupts that arrived on the way here. Instead, we clear 751 the flag in sim_stop_reason, after GDB has disabled the 752 interrupt signal handler. */ 753 for (;;) 754 { 755 if (stop) 756 { 757 stop = 0; 758 reason = sim_stopped; 759 siggnal = GDB_SIGNAL_INT; 760 break; 761 } 762 763 rc = setjmp (decode_jmp_buf); 764 if (rc == 0) 765 rc = decode_opcode (); 766 767 if (execution_error_get_last_error () != SIM_ERR_NONE) 768 { 769 reason = sim_stopped; 770 siggnal = GDB_SIGNAL_SEGV; 771 break; 772 } 773 774 if (!RX_STEPPED (rc)) 775 { 776 handle_step (rc); 777 break; 778 } 779 } 780 } 781 } 782 783 int 784 sim_stop (SIM_DESC sd) 785 { 786 stop = 1; 787 788 return 1; 789 } 790 791 void 792 sim_stop_reason (SIM_DESC sd, enum sim_stop *reason_p, int *sigrc_p) 793 { 794 check_desc (sd); 795 796 *reason_p = reason; 797 *sigrc_p = siggnal; 798 } 799 800 void 801 sim_do_command (SIM_DESC sd, const char *cmd) 802 { 803 const char *arg; 804 char **argv = buildargv (cmd); 805 806 check_desc (sd); 807 808 cmd = arg = ""; 809 if (argv != NULL) 810 { 811 if (argv[0] != NULL) 812 cmd = argv[0]; 813 if (argv[1] != NULL) 814 arg = argv[1]; 815 } 816 817 if (strcmp (cmd, "trace") == 0) 818 { 819 if (strcmp (arg, "on") == 0) 820 trace = 1; 821 else if (strcmp (arg, "off") == 0) 822 trace = 0; 823 else 824 printf ("The 'sim trace' command expects 'on' or 'off' " 825 "as an argument.\n"); 826 } 827 else if (strcmp (cmd, "verbose") == 0) 828 { 829 if (strcmp (arg, "on") == 0) 830 verbose = 1; 831 else if (strcmp (arg, "noisy") == 0) 832 verbose = 2; 833 else if (strcmp (arg, "off") == 0) 834 verbose = 0; 835 else 836 printf ("The 'sim verbose' command expects 'on', 'noisy', or 'off'" 837 " as an argument.\n"); 838 } 839 else 840 printf ("The 'sim' command expects either 'trace' or 'verbose'" 841 " as a subcommand.\n"); 842 843 freeargv (argv); 844 } 845 846 char ** 847 sim_complete_command (SIM_DESC sd, const char *text, const char *word) 848 { 849 return NULL; 850 } 851 852 /* Stub this out for now. */ 853 854 char * 855 sim_memory_map (SIM_DESC sd) 856 { 857 return NULL; 858 } 859