1 /* s390.h -- Header file for S390 opcode table 2 Copyright (C) 2000-2024 Free Software Foundation, Inc. 3 Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com). 4 5 This file is part of BFD, the Binary File Descriptor library. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 #ifndef S390_H 23 #define S390_H 24 25 /* List of instruction sets variations. */ 26 27 enum s390_opcode_mode_val 28 { 29 S390_OPCODE_ESA = 0, 30 S390_OPCODE_ZARCH 31 }; 32 33 enum s390_opcode_cpu_val 34 { 35 S390_OPCODE_G5 = 0, 36 S390_OPCODE_G6, 37 S390_OPCODE_Z900, 38 S390_OPCODE_Z990, 39 S390_OPCODE_Z9_109, 40 S390_OPCODE_Z9_EC, 41 S390_OPCODE_Z10, 42 S390_OPCODE_Z196, 43 S390_OPCODE_ZEC12, 44 S390_OPCODE_Z13, 45 S390_OPCODE_ARCH12, 46 S390_OPCODE_ARCH13, 47 S390_OPCODE_ARCH14, 48 S390_OPCODE_MAXCPU 49 }; 50 51 /* Values defined for the flags field of a struct s390_opcode. */ 52 53 /* Last one or two instruction operands are optional. */ 54 #define S390_INSTR_FLAG_OPTPARM 0x1 55 #define S390_INSTR_FLAG_OPTPARM2 0x2 56 57 /* Instruction requires a specific facility. */ 58 #define S390_INSTR_FLAG_HTM 0x4 59 #define S390_INSTR_FLAG_VX 0x8 60 #define S390_INSTR_FLAG_FACILITY_MASK 0xc 61 62 /* Instruction annotations for jump visualization. */ 63 #define S390_INSTR_FLAG_CLASS_BRANCH 0x10 64 #define S390_INSTR_FLAG_CLASS_RELATIVE 0x20 65 #define S390_INSTR_FLAG_CLASS_CONDITIONAL 0x40 66 #define S390_INSTR_FLAG_CLASS_SUBROUTINE 0x80 67 #define S390_INSTR_FLAG_CLASS_MASK 0xf0 68 69 #define S390_INSTR_FLAGS_CLASS_JUMP \ 70 (S390_INSTR_FLAG_CLASS_BRANCH | S390_INSTR_FLAG_CLASS_RELATIVE) 71 72 #define S390_INSTR_FLAGS_CLASS_CONDJUMP \ 73 (S390_INSTR_FLAG_CLASS_BRANCH | S390_INSTR_FLAG_CLASS_RELATIVE \ 74 | S390_INSTR_FLAG_CLASS_CONDITIONAL) 75 76 #define S390_INSTR_FLAGS_CLASS_JUMPSR \ 77 (S390_INSTR_FLAG_CLASS_BRANCH | S390_INSTR_FLAG_CLASS_RELATIVE \ 78 | S390_INSTR_FLAG_CLASS_SUBROUTINE) 79 80 /* Instruction is an .insn pseudo-mnemonic. */ 81 #define S390_INSTR_FLAG_PSEUDO_MNEMONIC 0x100 82 83 /* The opcode table is an array of struct s390_opcode. */ 84 85 struct s390_opcode 86 { 87 /* The opcode name (mnemonic). */ 88 const char * name; 89 90 /* The opcode itself. Those bits which will be filled in with 91 operands are zeroes. */ 92 unsigned char opcode[6]; 93 94 /* The opcode mask. This is used by the disassembler. This is a 95 mask containing ones indicating those bits which must match the 96 opcode field, and zeroes indicating those bits which need not 97 match (and are presumably filled in by operands). */ 98 unsigned char mask[6]; 99 100 /* The opcode length in bytes. */ 101 int oplen; 102 103 /* An array of operand codes. Each code is an index into the 104 operand table. They appear in the order which the operands must 105 appear in assembly code, and are terminated by a zero. */ 106 unsigned char operands[6]; 107 108 /* Bitmask of execution modes this opcode is available for. */ 109 unsigned int modes; 110 111 /* First cpu this opcode is available for. */ 112 enum s390_opcode_cpu_val min_cpu; 113 114 /* Instruction specific flags. */ 115 unsigned int flags; 116 117 /* Instruction description. */ 118 const char * description; 119 }; 120 121 /* The table itself is sorted by major opcode number, and is otherwise 122 in the order in which the disassembler should consider 123 instructions. */ 124 extern const struct s390_opcode s390_opcodes[]; 125 extern const int s390_num_opcodes; 126 127 /* A opcode format table for the .insn pseudo mnemonic. */ 128 extern const struct s390_opcode s390_opformats[]; 129 extern const int s390_num_opformats; 130 131 /* The operands table is an array of struct s390_operand. */ 132 133 struct s390_operand 134 { 135 /* The number of bits in the operand. */ 136 int bits; 137 138 /* How far the operand is left shifted in the instruction. */ 139 int shift; 140 141 /* One bit syntax flags. */ 142 unsigned long flags; 143 }; 144 145 /* Elements in the table are retrieved by indexing with values from 146 the operands field of the s390_opcodes table. */ 147 148 extern const struct s390_operand s390_operands[]; 149 150 /* Values defined for the flags field of a struct s390_operand. */ 151 152 /* This operand names a register. The disassembler uses this to print 153 register names with a leading 'r'. */ 154 #define S390_OPERAND_GPR 0x1 155 156 /* This operand names a floating point register. The disassembler 157 prints these with a leading 'f'. */ 158 #define S390_OPERAND_FPR 0x2 159 160 /* This operand names an access register. The disassembler 161 prints these with a leading 'a'. */ 162 #define S390_OPERAND_AR 0x4 163 164 /* This operand names a control register. The disassembler 165 prints these with a leading 'c'. */ 166 #define S390_OPERAND_CR 0x8 167 168 /* This operand is a displacement. */ 169 #define S390_OPERAND_DISP 0x10 170 171 /* This operand names a base register. */ 172 #define S390_OPERAND_BASE 0x20 173 174 /* This operand names an index register, it can be skipped. */ 175 #define S390_OPERAND_INDEX 0x40 176 177 /* This operand is a relative branch displacement. The disassembler 178 prints these symbolically if possible. */ 179 #define S390_OPERAND_PCREL 0x80 180 181 /* This operand takes signed values. */ 182 #define S390_OPERAND_SIGNED 0x100 183 184 /* This operand is a length. */ 185 #define S390_OPERAND_LENGTH 0x200 186 187 /* The operand needs to be a valid GP or FP register pair. */ 188 #define S390_OPERAND_REG_PAIR 0x400 189 190 /* This operand names a vector register. The disassembler uses this 191 to print register names with a leading 'v'. */ 192 #define S390_OPERAND_VR 0x800 193 194 #define S390_OPERAND_CP16 0x1000 195 196 #define S390_OPERAND_OR1 0x2000 197 #define S390_OPERAND_OR2 0x4000 198 #define S390_OPERAND_OR8 0x8000 199 200 #endif /* S390_H */ 201