1 /* Definitions of target machine for GNU compiler, NetBSD/arm ELF version. 2 Copyright (C) 2002-2022 Free Software Foundation, Inc. 3 Contributed by Wasabi Systems, Inc. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published 9 by the Free Software Foundation; either version 3, or (at your 10 option) any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 Under Section 7 of GPL version 3, you are granted additional 18 permissions described in the GCC Runtime Library Exception, version 19 3.1, as published by the Free Software Foundation. 20 21 You should have received a copy of the GNU General Public License and 22 a copy of the GCC Runtime Library Exception along with this program; 23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 24 <http://www.gnu.org/licenses/>. */ 25 26 /* Run-time Target Specification. */ 27 28 /* arm.h defaults to ARM6 CPU. */ 29 30 /* Default EABI to armv5t so that thumb shared libraries work. 31 The ARM926EH-S core is the default for armv5te, so set 32 SUBTARGET_CPU_DEFAULT to achieve this. */ 33 34 #define SUBTARGET_CPU_DEFAULT \ 35 (ARM_DEFAULT_ABI != ARM_ABI_APCS && ARM_DEFAULT_ABI != ARM_ABI_ATPCS \ 36 ? TARGET_CPU_arm926ejs : TARGET_CPU_arm6) 37 38 /* TARGET_BIG_ENDIAN_DEFAULT is set in 39 config.gcc for big endian configurations. */ 40 #if TARGET_BIG_ENDIAN_DEFAULT 41 #define TARGET_ENDIAN_DEFAULT MASK_BIG_END 42 #else 43 #define TARGET_ENDIAN_DEFAULT 0 44 #endif 45 46 #undef MULTILIB_DEFAULTS 47 48 /* Default it to use ATPCS with soft-VFP. */ 49 #undef TARGET_DEFAULT 50 #define TARGET_DEFAULT \ 51 (MASK_APCS_FRAME \ 52 | TARGET_ENDIAN_DEFAULT) 53 54 #undef ARM_DEFAULT_ABI 55 #define ARM_DEFAULT_ABI ARM_ABI_ATPCS 56 57 #undef TARGET_OS_CPP_BUILTINS 58 #define TARGET_OS_CPP_BUILTINS() \ 59 do \ 60 { \ 61 NETBSD_OS_CPP_BUILTINS_ELF(); \ 62 } \ 63 while (0) 64 65 #undef SUBTARGET_CPP_SPEC 66 #define SUBTARGET_CPP_SPEC NETBSD_CPP_SPEC 67 68 #undef SUBTARGET_EXTRA_ASM_SPEC 69 #define SUBTARGET_EXTRA_ASM_SPEC \ 70 "-matpcs %{mabi=aapcs*:-meabi=5} " \ 71 "%{" FPIE_OR_FPIC_SPEC ":-k}" 72 73 #undef SUBTARGET_EXTRA_SPECS 74 #define SUBTARGET_EXTRA_SPECS \ 75 { "subtarget_extra_asm_spec", SUBTARGET_EXTRA_ASM_SPEC }, \ 76 { "subtarget_asm_float_spec", SUBTARGET_ASM_FLOAT_SPEC }, \ 77 NETBSD_SUBTARGET_EXTRA_SPECS 78 79 /* Default to full VFP if -mfloat-abi=hard is specified. */ 80 #undef SUBTARGET_ASM_FLOAT_SPEC 81 #define SUBTARGET_ASM_FLOAT_SPEC \ 82 "%{mhard-float:%{!mfpu=*:-mfpu=vfp}} \ 83 %{mfloat-abi=hard:%{!mfpu=*:-mfpu=vfp}}" 84 85 #define NETBSD_ENTRY_POINT "__start" 86 87 #undef LINK_SPEC 88 #define LINK_SPEC \ 89 "-X \ 90 %{mbig-endian:-EB %{-mabi=aapcs*:-m armelfb_nbsd_eabi}} \ 91 %{mlittle-endian:-EL %{-mabi=aapcs*:-m armelf_nbsd_eabi}} \ 92 %(netbsd_link_spec)" 93 94 /* Make GCC agree with <machine/ansi.h>. */ 95 96 #undef SIZE_TYPE 97 #define SIZE_TYPE "long unsigned int" 98 99 #undef PTRDIFF_TYPE 100 #define PTRDIFF_TYPE "long int" 101 102 #undef INTPTR_TYPE 103 #define INTPTR_TYPE PTRDIFF_TYPE 104 105 #undef UINTPTR_TYPE 106 #define UINTPTR_TYPE SIZE_TYPE 107 108 /* We don't have any limit on the length as out debugger is GDB. */ 109 #undef DBX_CONTIN_LENGTH 110 111 /* NetBSD does its profiling differently to the Acorn compiler. We 112 don't need a word following the mcount call; and to skip it 113 requires either an assembly stub or use of fomit-frame-pointer when 114 compiling the profiling functions. Since we break Acorn CC 115 compatibility below a little more won't hurt. */ 116 117 #undef ARM_FUNCTION_PROFILER 118 #define ARM_FUNCTION_PROFILER(STREAM,LABELNO) \ 119 { \ 120 asm_fprintf (STREAM, "\tmov\t%Rip, %Rlr\n"); \ 121 asm_fprintf (STREAM, "\tbl\t__mcount%s\n", \ 122 (TARGET_ARM && NEED_PLT_RELOC) \ 123 ? "(PLT)" : ""); \ 124 } 125 126 /* VERY BIG NOTE: Change of structure alignment for NetBSD/arm. 127 There are consequences you should be aware of... 128 129 Normally GCC/arm uses a structure alignment of 32 for compatibility 130 with armcc. This means that structures are padded to a word 131 boundary. However this causes problems with bugged NetBSD kernel 132 code (possibly userland code as well - I have not checked every 133 binary). The nature of this bugged code is to rely on sizeof() 134 returning the correct size of various structures rounded to the 135 nearest byte (SCSI and ether code are two examples, the vm system 136 is another). This code breaks when the structure alignment is 32 137 as sizeof() will report a word=rounded size. By changing the 138 structure alignment to 8. GCC will conform to what is expected by 139 NetBSD. 140 141 This has several side effects that should be considered. 142 1. Structures will only be aligned to the size of the largest member. 143 i.e. structures containing only bytes will be byte aligned. 144 structures containing shorts will be half word aligned. 145 structures containing ints will be word aligned. 146 147 This means structures should be padded to a word boundary if 148 alignment of 32 is required for byte structures etc. 149 150 2. A potential performance penalty may exist if strings are no longer 151 word aligned. GCC will not be able to use word load/stores to copy 152 short strings. 153 154 This modification is not encouraged but with the present state of the 155 NetBSD source tree it is currently the only solution that meets the 156 requirements. */ 157 158 #undef DEFAULT_STRUCTURE_SIZE_BOUNDARY 159 #define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8 160 161 #define SYSARCH_ARM_SYNC_ICACHE 0 162 163 /* Clear the instruction cache from `BEG' to `END'. This makes a 164 call to the ARM_SYNC_ICACHE architecture specific syscall. */ 165 #define CLEAR_INSN_CACHE(BEG, END) \ 166 do \ 167 { \ 168 extern int sysarch(int number, void *args); \ 169 struct \ 170 { \ 171 unsigned int addr; \ 172 int len; \ 173 } s; \ 174 s.addr = (unsigned int)(BEG); \ 175 s.len = (END) - (BEG); \ 176 (void) sysarch (SYSARCH_ARM_SYNC_ICACHE, &s); \ 177 } \ 178 while (0) 179