xref: /netbsd-src/external/gpl3/gcc.old/dist/gcc/common/config/i386/i386-cpuinfo.h (revision 4ac76180e904e771b9d522c7e57296d371f06499)
1 /* Get CPU type and Features for x86 processors.
2    Copyright (C) 2012-2020 Free Software Foundation, Inc.
3    Contributed by Sriraman Tallam (tmsriram@google.com)
4 
5 This file is part of GCC.
6 
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
11 
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
15 for more details.
16 
17 Under Section 7 of GPL version 3, you are granted additional
18 permissions described in the GCC Runtime Library Exception, version
19 3.1, as published by the Free Software Foundation.
20 
21 You should have received a copy of the GNU General Public License and
22 a copy of the GCC Runtime Library Exception along with this program;
23 see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
24 <http://www.gnu.org/licenses/>.  */
25 
26 /* Processor Vendor and Models. */
27 
28 enum processor_vendor
29 {
30   VENDOR_INTEL = 1,
31   VENDOR_AMD,
32   VENDOR_OTHER,
33 
34   /* Maximum values must be at the end of this enum.  */
35   VENDOR_MAX,
36   BUILTIN_VENDOR_MAX = VENDOR_OTHER
37 };
38 
39 /* Any new types or subtypes have to be inserted at the end. */
40 
41 enum processor_types
42 {
43   INTEL_BONNELL = 1,
44   INTEL_CORE2,
45   INTEL_COREI7,
46   AMDFAM10H,
47   AMDFAM15H,
48   INTEL_SILVERMONT,
49   INTEL_KNL,
50   AMD_BTVER1,
51   AMD_BTVER2,
52   AMDFAM17H,
53   INTEL_KNM,
54   INTEL_GOLDMONT,
55   INTEL_GOLDMONT_PLUS,
56   INTEL_TREMONT,
57   AMDFAM19H,
58   CPU_TYPE_MAX,
59   BUILTIN_CPU_TYPE_MAX = CPU_TYPE_MAX
60 };
61 
62 enum processor_subtypes
63 {
64   INTEL_COREI7_NEHALEM = 1,
65   INTEL_COREI7_WESTMERE,
66   INTEL_COREI7_SANDYBRIDGE,
67   AMDFAM10H_BARCELONA,
68   AMDFAM10H_SHANGHAI,
69   AMDFAM10H_ISTANBUL,
70   AMDFAM15H_BDVER1,
71   AMDFAM15H_BDVER2,
72   AMDFAM15H_BDVER3,
73   AMDFAM15H_BDVER4,
74   AMDFAM17H_ZNVER1,
75   INTEL_COREI7_IVYBRIDGE,
76   INTEL_COREI7_HASWELL,
77   INTEL_COREI7_BROADWELL,
78   INTEL_COREI7_SKYLAKE,
79   INTEL_COREI7_SKYLAKE_AVX512,
80   INTEL_COREI7_CANNONLAKE,
81   INTEL_COREI7_ICELAKE_CLIENT,
82   INTEL_COREI7_ICELAKE_SERVER,
83   AMDFAM17H_ZNVER2,
84   INTEL_COREI7_CASCADELAKE,
85   INTEL_COREI7_TIGERLAKE,
86   INTEL_COREI7_COOPERLAKE,
87   AMDFAM19H_ZNVER3,
88   CPU_SUBTYPE_MAX
89 };
90 
91 /* Priority of i386 features, greater value is higher priority.   This is
92    used to decide the order in which function dispatch must happen.  For
93    instance, a version specialized for SSE4.2 should be checked for dispatch
94    before a version for SSE3, as SSE4.2 implies SSE3.  */
95 enum feature_priority
96 {
97   P_NONE = 0,
98   P_MMX,
99   P_SSE,
100   P_SSE2,
101   P_SSE3,
102   P_SSSE3,
103   P_PROC_SSSE3,
104   P_SSE4_A,
105   P_PROC_SSE4_A,
106   P_SSE4_1,
107   P_SSE4_2,
108   P_PROC_SSE4_2,
109   P_POPCNT,
110   P_AES,
111   P_PCLMUL,
112   P_AVX,
113   P_PROC_AVX,
114   P_BMI,
115   P_PROC_BMI,
116   P_FMA4,
117   P_XOP,
118   P_PROC_XOP,
119   P_FMA,
120   P_PROC_FMA,
121   P_BMI2,
122   P_AVX2,
123   P_PROC_AVX2,
124   P_AVX512F,
125   P_PROC_AVX512F,
126   P_PROC_DYNAMIC
127 };
128 
129 /* These are the values for vendor types, cpu types and subtypes.  Cpu
130    types and subtypes should be subtracted by the corresponding start
131    value.  */
132 
133 #define M_CPU_TYPE_START (BUILTIN_VENDOR_MAX)
134 #define M_CPU_SUBTYPE_START \
135   (M_CPU_TYPE_START + BUILTIN_CPU_TYPE_MAX)
136 #define M_VENDOR(a) (a)
137 #define M_CPU_TYPE(a) (M_CPU_TYPE_START + a)
138 #define M_CPU_SUBTYPE(a) (M_CPU_SUBTYPE_START + a)
139