12024-01-15 Nick Clifton <nickc@redhat.com> 2 3 * 2.42 branch point. 4 52023-07-03 Nick Clifton <nickc@redhat.com> 6 7 2.41 Branch Point. 8 92023-03-15 Nick Clifton <nickc@redhat.com> 10 11 PR 30231 12 * mep.opc (mep_print_insn): Check for an out of range index. 13 142022-12-31 Nick Clifton <nickc@redhat.com> 15 16 * 2.40 branch created. 17 182022-07-08 Nick Clifton <nickc@redhat.com> 19 20 * 2.39 branch created. 21 222022-01-22 Nick Clifton <nickc@redhat.com> 23 24 * 2.38 release branch created. 25 262021-07-05 Alan Modra <amodra@gmail.com> 27 28 * mep.opc (macros): Make static and const. 29 (lookup_macro): Return and use const pointer. 30 (expand_macro): Make mac param const. 31 (expand_string): Make pmacro const. 32 332021-07-03 Nick Clifton <nickc@redhat.com> 34 35 * 2.37 release branch created. 36 372021-05-06 Stafford Horne <shorne@gmail.com> 38 39 PR 21464 40 * or1k.opc (or1k_imm16_relocs, parse_reloc): Define parse logic 41 for gotha() relocation. 42 432021-03-31 Alan Modra <amodra@gmail.com> 44 45 * frv.opc: Replace bfd_boolean with bool, FALSE with false, and 46 TRUE with true throughout. 47 482021-03-29 Alan Modra <amodra@gmail.com> 49 50 * frv.opc (frv_is_branch_major, frv_is_float_major), 51 (frv_is_media_major, frv_is_branch_insn, frv_is_float_insn), 52 (frv_is_media_insn, spr_valid): Correct prototypes. 53 542021-01-09 Nick Clifton <nickc@redhat.com> 55 56 * 2.36 release branch crated. 57 582020-10-05 Samanta Navarro <ferivoz@riseup.net> 59 60 * m32r.cpu: Fix spelling mistakes. 61 622020-09-18 David Faust <david.faust@oracle.com> 63 64 * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD. 65 (define-alu-insn-bin, daib): Take ISAs as an argument. 66 (define-alu-instructions): Update calls to daib pmacro with 67 ISAs; add sdiv and smod. 68 692020-09-08 David Faust <david.faust@oracle.com> 70 71 * bpf.cpu (define-alu-instructions): Correct semantic operators 72 for div, mod to unsigned versions. 73 742020-09-01 Alan Modra <amodra@gmail.com> 75 76 * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed 77 value by two rather than shifting left. 78 (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract. 79 802020-08-26 David Faust <david.faust@oracle.com> 81 82 * bpf.cpu (arch bpf): Add xbpf mach and isas. 83 (define-xbpf-isa) New pmacro. 84 (all-isas) Add xbpfle,xbpfbe. 85 (endian-isas): New pmacro. 86 (mach xbpf): New. 87 (model xbpf-def): Likewise. 88 (h-gpr): Add xbpf mach. 89 (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa. 90 (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa. 91 (define-alu-insn-un): Use new endian-isas pmacro. 92 (define-alu-insn-bin, define-alu-insn-mov): Likewise. 93 (define-endian-insn, define-lddw): Likewise. 94 (dlind, dxli, dxsi, dsti): Likewise. 95 (define-cond-jump-insn, define-call-insn): Likewise. 96 (define-atomic-insns): Likewise. 97 982020-07-04 Nick Clifton <nickc@redhat.com> 99 100 Binutils 2.35 branch created. 101 1022020-06-25 David Faust <david.faust@oracle.com> 103 104 * bpf.cpu (f-offset16): Change type from INT to HI. 105 (dxli): Simplify memory access. 106 (dxsi): Likewise. 107 (define-endian-insn): Update c-call in semantics. 108 (dlabs) Likewise. 109 (dlind) Likewise. 110 1112020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com> 112 113 * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64. 114 * bpf.opc (bpf_print_insn): Do not set endian_code here. 115 1162020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com> 117 118 * mep.opc (print_slot_insn): Pass the insn endianness to 119 cgen_get_insn_value. 120 1212020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com> 122 David Faust <david.faust@oracle.com> 123 124 * bpf.cpu (define-alu-insn-un): Add definitions of semantics. 125 (define-alu-insn-mov): Likewise. 126 (daib): Likewise. 127 (define-alu-instructions): Likewise. 128 (define-endian-insn): Likewise. 129 (define-lddw): Likewise. 130 (dlabs): Likewise. 131 (dlind): Likewise. 132 (dxli): Likewise. 133 (dxsi): Likewise. 134 (dsti): Likewise. 135 (define-ldstx-insns): Likewise. 136 (define-st-insns): Likewise. 137 (define-cond-jump-insn): Likewise. 138 (dcji): Likewise. 139 (define-condjump-insns): Likewise. 140 (define-call-insn): Likewise. 141 (ja): Likewise. 142 ("exit"): Likewise. 143 (define-atomic-insns): Likewise. 144 (sem-exchange-and-add): New macro. 145 * bpf.cpu ("brkpt"): New instruction. 146 (bpfbf): Set word-bitsize to 32 and insn-endian big. 147 (h-gpr): Prefer r0 to `a' and r6 to `ctx'. 148 (h-pc): Expand definition. 149 * bpf.opc (bpf_print_insn): Set endian_code to BIG. 150 1512020-05-21 Alan Modra <amodra@gmail.com> 152 153 * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace 154 "if (x) free (x)" with "free (x)". 155 1562020-05-19 Stafford Horne <shorne@gmail.com> 157 158 PR 25184 159 * or1k.cpu (arch or1k): Remove or64 and or64nd machs. 160 (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros. 161 (cpu or1k64bf, mach or64, mach or64nd): Remove definitions. 162 * or1kcommon.cpu (h-fdr): Remove hardware. 163 * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions. 164 (float-regreg-insn): Remove lf- mnemonic -d instruction pattern. 165 (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern. 166 (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern. 167 (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove. 168 1692020-02-16 David Faust <david.faust@oracle.com> 170 171 * bpf.cpu (define-cond-jump-insn): Renamed from djci. 172 (dcji) New version with support for JMP32 173 1742020-02-03 Alan Modra <amodra@gmail.com> 175 176 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value. 177 1782020-02-01 Alan Modra <amodra@gmail.com> 179 180 * frv.cpu (f-u12): Multiply rather than left shift signed values. 181 (f-label16, f-label24): Likewise. 182 1832020-01-30 Alan Modra <amodra@gmail.com> 184 185 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting. 186 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise. 187 (f-dst32-rn-prefixed-QI): Likewise. 188 (f-dsp-32-s32): Mask before shifting left. 189 (f-dsp-48-u32, f-dsp-48-s32): Likewise. 190 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than 191 shifting left. 192 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise. 193 (h-gr-SI): Mask before shifting. 194 1952020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com> 196 197 * bpf.cpu (define-alu-insn-un): The unary BPF instructions 198 (neg and neg32) use OP_SRC_K even if they operate only in 199 registers. 200 2012020-01-18 Nick Clifton <nickc@redhat.com> 202 203 Binutils 2.34 branch created. 204 2052020-01-13 Alan Modra <amodra@gmail.com> 206 207 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't 208 left shift signed values. 209 2102020-01-06 Alan Modra <amodra@gmail.com> 211 212 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign 213 bits before shifting rather than masking after shifting. 214 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise. 215 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise. 216 (f-dsp-64-u16, f-dsp-8-s24): Likewise. 217 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift. 218 2192020-01-04 Alan Modra <amodra@gmail.com> 220 221 * m32r.cpu (f-disp8): Avoid left shift of negative values. 222 (f-disp16, f-disp24): Likewise. 223 2242019-12-23 Alan Modra <amodra@gmail.com> 225 226 * iq2000.cpu (f-offset): Avoid left shift of negative values. 227 2282019-12-20 Alan Modra <amodra@gmail.com> 229 230 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values. 231 2322019-12-17 Alan Modra <amodra@gmail.com> 233 234 * bpf.cpu (f-imm64): Avoid signed overflow. 235 2362019-12-16 Alan Modra <amodra@gmail.com> 237 238 * xstormy16.cpu (f-rel12a): Avoid signed overflow. 239 2402019-12-11 Alan Modra <amodra@gmail.com> 241 242 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts. 243 * lm32.cpu (f-branch, f-vall): Likewise. 244 * m32.cpu (f-lab-8-16): Likewise. 245 2462019-12-11 Alan Modra <amodra@gmail.com> 247 248 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than 249 shift left to avoid UB on left shift of negative values. 250 2512019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com> 252 253 * bpf.cpu: Fix comment describing the 128-bit instruction format. 254 2552019-09-09 Phil Blundell <pb@pbcl.net> 256 257 binutils 2.33 branch created. 258 2592019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com> 260 261 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of 262 %a and %ctx. 263 2642019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com> 265 266 * bpf.cpu (dlabs): New pmacro. 267 (dlind): Likewise. 268 2692019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com> 270 271 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an 272 explicit 'dst' argument. 273 2742019-06-13 Stafford Horne <shorne@gmail.com> 275 276 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol. 277 2782019-06-13 Stafford Horne <shorne@gmail.com> 279 280 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a 281 (l-adrp): Improve comment. 282 2832019-06-13 Stafford Horne <shorne@gmail.com> 284 285 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S, 286 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D, 287 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes. 288 (float-setflag-insn-base): New pmacro based on float-setflag-insn. 289 (float-setflag-symantics, float-setflag-unordered-cmp-symantics, 290 float-setflag-unordered-symantics): New pmacro for instruction 291 symantics. 292 (float-setflag-insn): Update to use float-setflag-insn-base. 293 (float-setflag-unordered-insn): New pmacro for generating instructions. 294 2952019-06-13 Andrey Bacherov <avbacherov@opencores.org> 296 Stafford Horne <shorne@gmail.com> 297 298 * or1k.cpu (ORFPX64A32-MACHS): New pmacro. 299 (ORFPX-MACHS): Removed pmacro. 300 * or1k.opc (or1k_cgen_insn_supported): New function. 301 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro. 302 (parse_regpair, print_regpair): New functions. 303 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder 304 and add comments. 305 (h-fdr): Update comment to indicate or64. 306 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs. 307 (h-fd32r): New hardware for 64-bit fpu registers. 308 (h-i64r): New hardware for 64-bit int registers. 309 * or1korbis.cpu (f-resv-8-1): New field. 310 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS. 311 (rDDF, rADF, rBDF): Update operand comment to indicate or64. 312 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields. 313 (h-roff1): New hardware. 314 (double-field-and-ops mnemonic): New pmacro to generate operations 315 rDD32F, rAD32F, rBD32F, rDDI and rADI. 316 (float-regreg-insn): Update single precision generator to MACH 317 ORFPX32-MACHS. Add generator for or32 64-bit instructions. 318 (float-setflag-insn): Update single precision generator to MACH 319 ORFPX32-MACHS. Fix double instructions from single to double 320 precision. Add generator for or32 64-bit instructions. 321 (float-cust-insn cust-num): Update single precision generator to MACH 322 ORFPX32-MACHS. Add generator for or32 64-bit instructions. 323 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to 324 ORFPX32-MACHS. 325 (lf-rem-d): Fix operation from mod to rem. 326 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction. 327 (lf-itof-d): Fix operands from single to double. 328 (lf-ftoi-d): Update operand mode from DI to WI. 329 3302019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com> 331 332 * bpf.cpu: New file. 333 * bpf.opc: Likewise. 334 3352018-06-24 Nick Clifton <nickc@redhat.com> 336 337 2.32 branch created. 338 3392018-10-05 Richard Henderson <rth@twiddle.net> 340 Stafford Horne <shorne@gmail.com> 341 342 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU. 343 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU. 344 (l-mul): Fix overflow support and indentation. 345 (l-mulu): Fix overflow support and indentation. 346 (l-muld, l-muldu, l-msbu, l-macu): New instructions. 347 (l-div); Remove incorrect carry behavior. 348 (l-divu): Fix carry and overflow behavior. 349 (l-mac): Add overflow support. 350 (l-msb, l-msbu): Add carry and overflow support. 351 3522018-10-05 Richard Henderson <rth@twiddle.net> 353 354 * or1k.opc (parse_disp26): Add support for plta() relocations. 355 (parse_disp21): New function. 356 (or1k_rclass): New enum. 357 (or1k_rtype): New enum. 358 (or1k_imm16_relocs): Define new PO and SPO relocation mappings. 359 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations. 360 (parse_imm16): Add support for the new 21bit and 13bit relocations. 361 * or1korbis.cpu (f-disp26): Don't assume SI. 362 (f-disp21): New pc-relative 21-bit 13 shifted to right. 363 (insn-opcode): Add ADRP. 364 (l-adrp): New instruction. 365 3662018-10-05 Richard Henderson <rth@twiddle.net> 367 368 * or1k.opc: Add RTYPE_ enum. 369 (INVALID_STORE_RELOC): New string. 370 (or1k_imm16_relocs): New array array. 371 (parse_reloc): New static function that just does the parsing. 372 (parse_imm16): New static function for generic parsing. 373 (parse_simm16): Change to just call parse_imm16. 374 (parse_simm16_split): New function. 375 (parse_uimm16): Change to call parse_imm16. 376 (parse_uimm16_split): New function. 377 * or1korbis.cpu (simm16-split): Change to use new simm16_split. 378 (uimm16-split): Change to use new uimm16_split. 379 3802018-07-24 Alan Modra <amodra@gmail.com> 381 382 PR 23430 383 * or1kcommon.cpu (spr-reg-indices): Fix description typo. 384 3852018-05-09 Sebastian Rasmussen <sebras@gmail.com> 386 387 * or1kcommon.cpu (spr-reg-info): Typo fix. 388 3892018-03-03 Alan Modra <amodra@gmail.com> 390 391 * frv.opc: Include opintl.h. 392 (add_next_to_vliw): Use opcodes_error_handler to print error. 393 Standardize error message. 394 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise. 395 3962018-01-13 Nick Clifton <nickc@redhat.com> 397 398 2.30 branch created. 399 4002017-03-15 Stafford Horne <shorne@gmail.com> 401 402 * or1kcommon.cpu: Add pc set semantics to also update ppc. 403 4042016-10-06 Alan Modra <amodra@gmail.com> 405 406 * mep.opc (expand_string): Add fall through comment. 407 4082016-03-03 Alan Modra <amodra@gmail.com> 409 410 * fr30.cpu (f-m4): Replace bogus comment with a better guess 411 at what is really going on. 412 4132016-03-02 Alan Modra <amodra@gmail.com> 414 415 * fr30.cpu (f-m4): Replace -1 << 4 with -16. 416 4172016-02-02 Andrew Burgess <andrew.burgess@embecosm.com> 418 419 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to 420 a constant to better align disassembler output. 421 4222014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 423 424 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions. 425 4262014-06-12 Alan Modra <amodra@gmail.com> 427 428 * or1k.opc: Whitespace fixes. 429 4302014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 431 432 * or1korbis.cpu (h-atomic-reserve): New hardware. 433 (h-atomic-address): Likewise. 434 (insn-opcode): Add opcodes for LWA and SWA. 435 (atomic-reserve): New operand. 436 (atomic-address): Likewise. 437 (l-lwa, l-swa): New instructions. 438 (l-lbs): Fix typo in comment. 439 (store-insn): Clear atomic reserve on store to atomic-address. 440 Fix register names in fmt field. 441 4422014-04-22 Christian Svensson <blue@cmd.nu> 443 444 * openrisc.cpu: Delete. 445 * openrisc.opc: Delete. 446 * or1k.cpu: New file. 447 * or1k.opc: New file. 448 * or1kcommon.cpu: New file. 449 * or1korbis.cpu: New file. 450 * or1korfpx.cpu: New file. 451 4522013-12-07 Mike Frysinger <vapier@gentoo.org> 453 454 * epiphany.opc: Remove +x file mode. 455 4562013-03-08 Yann Sionneau <yann.sionneau@gmail.com> 457 458 PR binutils/15241 459 * lm32.cpu (Control and status registers): Add CFG2, PSW, 460 TLBVADDR, TLBPADDR and TLBBADVADDR. 461 4622012-11-30 Oleg Raikhman <oleg@adapteva.com> 463 Joern Rennecke <joern.rennecke@embecosm.com> 464 465 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12. 466 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l. 467 (testset-insn): Add NO_DIS attribute to t.l. 468 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l. 469 (move-insns): Add NO-DIS attribute to cmov.l. 470 (op-mmr-movts): Add NO-DIS attribute to movts.l. 471 (op-mmr-movfs): Add NO-DIS attribute to movfs.l. 472 (op-rrr): Add NO-DIS attribute to .l. 473 (shift-rrr): Add NO-DIS attribute to .l. 474 (op-shift-rri): Add NO-DIS attribute to i32.l. 475 (bitrl, movtl): Add NO-DIS attribute. 476 (op-iextrrr): Add NO-DIS attribute to .l 477 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l. 478 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise. 479 4802012-02-27 Alan Modra <amodra@gmail.com> 481 482 * mt.opc (print_dollarhex): Trim values to 32 bits. 483 4842011-12-15 Nick Clifton <nickc@redhat.com> 485 486 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit 487 hosts. 488 4892011-10-26 Joern Rennecke <joern.rennecke@embecosm.com> 490 491 * epiphany.opc (parse_branch_addr): Fix type of valuep. 492 Cast value before printing it as a long. 493 (parse_postindex): Fix type of valuep. 494 4952011-10-25 Joern Rennecke <joern.rennecke@embecosm.com> 496 497 * cpu/epiphany.cpu: New file. 498 * cpu/epiphany.opc: New file. 499 5002011-08-22 Nick Clifton <nickc@redhat.com> 501 502 * fr30.cpu: Newly contributed file. 503 * fr30.opc: Likewise. 504 * ip2k.cpu: Likewise. 505 * ip2k.opc: Likewise. 506 * mep-avc.cpu: Likewise. 507 * mep-avc2.cpu: Likewise. 508 * mep-c5.cpu: Likewise. 509 * mep-core.cpu: Likewise. 510 * mep-default.cpu: Likewise. 511 * mep-ext-cop.cpu: Likewise. 512 * mep-fmax.cpu: Likewise. 513 * mep-h1.cpu: Likewise. 514 * mep-ivc2.cpu: Likewise. 515 * mep-rhcop.cpu: Likewise. 516 * mep-sample-ucidsp.cpu: Likewise. 517 * mep.cpu: Likewise. 518 * mep.opc: Likewise. 519 * openrisc.cpu: Likewise. 520 * openrisc.opc: Likewise. 521 * xstormy16.cpu: Likewise. 522 * xstormy16.opc: Likewise. 523 5242010-10-08 Pierre Muller <muller@ics.u-strasbg.fr> 525 526 * frv.opc: #undef DEBUG. 527 5282010-07-03 DJ Delorie <dj@delorie.com> 529 530 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it. 531 5322010-02-11 Doug Evans <dje@sebabeach.org> 533 534 * m32r.cpu (HASH-PREFIX): Delete. 535 (duhpo, dshpo): New pmacros. 536 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo. 537 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX 538 attribute, define with dshpo. 539 (uimm24): Delete HASH-PREFIX attribute. 540 * m32r.opc (CGEN_PRINT_NORMAL): Delete. 541 (print_signed_with_hash_prefix): New function. 542 (print_unsigned_with_hash_prefix): New function. 543 * xc16x.cpu (dowh): New pmacro. 544 (upof16): Define with dowh, specify print handler. 545 (qbit, qlobit, qhibit): Ditto. 546 (upag16): Ditto. 547 * xc16x.opc (CGEN_PRINT_NORMAL): Delete. 548 (print_with_dot_prefix): New functions. 549 (print_with_pof_prefix, print_with_pag_prefix): New functions. 550 5512010-01-24 Doug Evans <dje@sebabeach.org> 552 553 * frv.cpu (floating-point-conversion): Update call to fp conv op. 554 (floating-point-dual-conversion, ne-floating-point-dual-conversion, 555 conditional-floating-point-conversion, ne-floating-point-conversion, 556 float-parallel-mul-add-double-semantics): Ditto. 557 5582010-01-05 Doug Evans <dje@sebabeach.org> 559 560 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler. 561 (f-dsp-40-u20, f-dsp-40-u24): Ditto. 562 5632010-01-02 Doug Evans <dje@sebabeach.org> 564 565 * m32c.opc (parse_signed16): Fix typo. 566 5672009-12-11 Nick Clifton <nickc@redhat.com> 568 569 * frv.opc: Fix shadowed variable warnings. 570 * m32c.opc: Fix shadowed variable warnings. 571 5722009-11-14 Doug Evans <dje@sebabeach.org> 573 574 Must use VOID expression in VOID context. 575 * xc16x.cpu (mov4): Fix mode of `sequence'. 576 (mov9, mov10): Ditto. 577 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'. 578 (callr, callseg, calls, trap, rets, reti): Ditto. 579 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'. 580 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'. 581 (exts, exts1, extsr, extsr1, prior): Ditto. 582 5832009-10-23 Doug Evans <dje@sebabeach.org> 584 585 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h. 586 cgen-ops.h -> cgen/basic-ops.h. 587 5882009-09-25 Alan Modra <amodra@bigpond.net.au> 589 590 * m32r.cpu (stb-plus): Typo fix. 591 5922009-09-23 Doug Evans <dje@sebabeach.org> 593 594 * m32r.cpu (sth-plus): Fix address mode and calculation. 595 (stb-plus): Ditto. 596 (clrpsw): Fix mask calculation. 597 (bset, bclr, btst): Make mode in bit calculation match expression. 598 599 * xc16x.cpu (rtl-version): Set to 0.8. 600 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix, 601 make uppercase. Remove unnecessary name-prefix spec. 602 (grb-names, conditioncode-names, extconditioncode-names): Ditto. 603 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto. 604 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto. 605 (h-cr): New hardware. 606 (muls): Comment out parts that won't compile, add fixme. 607 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto. 608 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto. 609 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto. 610 6112009-07-16 Doug Evans <dje@sebabeach.org> 612 613 * cpu/simplify.inc (*): One line doc strings don't need \n. 614 (df): Invoke define-full-ifield instead of claiming it's an alias. 615 (dno): Define. 616 (dnop): Mark as deprecated. 617 6182009-06-22 Alan Modra <amodra@bigpond.net.au> 619 620 * m32c.opc (parse_lab_5_3): Use correct enum. 621 6222009-01-07 Hans-Peter Nilsson <hp@axis.com> 623 624 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI. 625 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros. 626 (media-arith-sat-semantics): Explicitly sign- or zero-extend 627 arguments of "operation" to DI using "mode" and the new pmacros. 628 6292009-01-03 Hans-Peter Nilsson <hp@axis.com> 630 631 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size 632 of number 2, PID. 633 6342008-12-23 Jon Beniston <jon@beniston.com> 635 636 * lm32.cpu: New file. 637 * lm32.opc: New file. 638 6392008-01-29 Alan Modra <amodra@bigpond.net.au> 640 641 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change 642 to source. 643 6442007-10-22 Hans-Peter Nilsson <hp@axis.com> 645 646 * cris.cpu (movs, movu): Use result of extension operation when 647 updating flags. 648 6492007-07-04 Nick Clifton <nickc@redhat.com> 650 651 * cris.cpu: Update copyright notice to refer to GPLv3. 652 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu, 653 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu, 654 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu, 655 xc16x.opc: Likewise. 656 * iq2000.cpu: Fix copyright notice to refer to FSF. 657 6582007-04-30 Mark Salter <msalter@sadr.localdomain> 659 660 * frv.cpu (spr-names): Support new coprocessor SPR registers. 661 6622007-04-20 Nick Clifton <nickc@redhat.com> 663 664 * xc16x.cpu: Restore after accidentally overwriting this file with 665 xc16x.opc. 666 6672007-03-29 DJ Delorie <dj@redhat.com> 668 669 * m32c.cpu (Imm-8-s4n): Fix print hook. 670 (Lab-24-8, Lab-32-8, Lab-40-8): Fix. 671 (arith-jnz-imm4-dst-defn): Make relaxable. 672 (arith-jnz16-imm4-dst-defn): Fix encodings. 673 6742007-03-20 DJ Delorie <dj@redhat.com> 675 676 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20, 677 mem20): New. 678 (src16-16-20-An-relative-*): New. 679 (dst16-*-20-An-relative-*): New. 680 (dst16-16-16sa-*): New 681 (dst16-16-16ar-*): New 682 (dst32-16-16sa-Unprefixed-*): New 683 (jsri): Fix operands. 684 (setzx): Fix encoding. 685 6862007-03-08 Alan Modra <amodra@bigpond.net.au> 687 688 * m32r.opc: Formatting. 689 6902006-05-22 Nick Clifton <nickc@redhat.com> 691 692 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu. 693 6942006-04-10 DJ Delorie <dj@redhat.com> 695 696 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which 697 decides if this function accepts symbolic constants or not. 698 (parse_signed_bitbase): Likewise. 699 (parse_unsigned_bitbase8): Pass the new parameter. 700 (parse_unsigned_bitbase11): Likewise. 701 (parse_unsigned_bitbase16): Likewise. 702 (parse_unsigned_bitbase19): Likewise. 703 (parse_unsigned_bitbase27): Likewise. 704 (parse_signed_bitbase8): Likewise. 705 (parse_signed_bitbase11): Likewise. 706 (parse_signed_bitbase19): Likewise. 707 7082006-03-13 DJ Delorie <dj@redhat.com> 709 710 * m32c.cpu (Bit3-S): New. 711 (btst:s): New. 712 * m32c.opc (parse_bit3_S): New. 713 714 * m32c.cpu (decimal-subtraction16-insn): Add second operand. 715 (btst): Add optional :G suffix for MACH32. 716 (or.b:S): New. 717 (pop.w:G): Add optional :G suffix for MACH16. 718 (push.b.imm): Fix syntax. 719 7202006-03-10 DJ Delorie <dj@redhat.com> 721 722 * m32c.cpu (mul.l): New. 723 (mulu.l): New. 724 7252006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) 726 727 * xc16x.opc (parse_hash): Return NULL if the input was parsed or 728 an error message otherwise. 729 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise. 730 Fix up comments to correctly describe the functions. 731 7322006-02-24 DJ Delorie <dj@redhat.com> 733 734 * m32c.cpu (RL_TYPE): New attribute, with macros. 735 (Lab-8-24): Add RELAX. 736 (unary-insn-defn-g, binary-arith-imm-dst-defn, 737 binary-arith-imm4-dst-defn): Add 1ADDR attribute. 738 (binary-arith-src-dst-defn): Add 2ADDR attribute. 739 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, 740 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP 741 attribute. 742 (jsri16, jsri32): Add 1ADDR attribute. 743 (jsr32.w, jsr32.a): Add JUMP attribute. 744 7452006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> 746 Anil Paranjape <anilp1@kpitcummins.com> 747 Shilin Shakti <shilins@kpitcummins.com> 748 749 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU 750 description. 751 * xc16x.opc: New file containing supporting XC16C routines. 752 7532006-02-10 Nick Clifton <nickc@redhat.com> 754 755 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits. 756 7572006-01-06 DJ Delorie <dj@redhat.com> 758 759 * m32c.cpu (mov.w:q): Fix mode. 760 (push32.b.imm): Likewise, for the comment. 761 7622005-12-16 Nathan Sidwell <nathan@codesourcery.com> 763 764 Second part of ms1 to mt renaming. 765 * mt.cpu (define-arch, define-isa): Set name to mt. 766 (define-mach): Adjust. 767 * mt.opc (CGEN_ASM_HASH): Update. 768 (mt_asm_hash, mt_cgen_insn_supported): Renamed. 769 (parse_loopsize, parse_imm16): Adjust. 770 7712005-12-13 DJ Delorie <dj@redhat.com> 772 773 * m32c.cpu (jsri): Fix order so register names aren't treated as 774 symbols. 775 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw, 776 indexwd, indexws): Fix encodings. 777 7782005-12-12 Nathan Sidwell <nathan@codesourcery.com> 779 780 * mt.cpu: Rename from ms1.cpu. 781 * mt.opc: Rename from ms1.opc. 782 7832005-12-06 Hans-Peter Nilsson <hp@axis.com> 784 785 * cris.cpu (simplecris-common-writable-specregs) 786 (simplecris-common-readable-specregs): Split from 787 simplecris-common-specregs. All users changed. 788 (cris-implemented-writable-specregs-v0) 789 (cris-implemented-readable-specregs-v0): Similar from 790 cris-implemented-specregs-v0. 791 (cris-implemented-writable-specregs-v3) 792 (cris-implemented-readable-specregs-v3) 793 (cris-implemented-writable-specregs-v8) 794 (cris-implemented-readable-specregs-v8) 795 (cris-implemented-writable-specregs-v10) 796 (cris-implemented-readable-specregs-v10) 797 (cris-implemented-writable-specregs-v32) 798 (cris-implemented-readable-specregs-v32): Similar. 799 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New 800 insns and specializations. 801 8022005-11-08 Nathan Sidwell <nathan@codesourcery.com> 803 804 Add ms2 805 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and 806 model. 807 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, 808 f-cb2incr, f-rc3): New fields. 809 (LOOP): New instruction. 810 (JAL-HAZARD): New hazard. 811 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): 812 New operands. 813 (mul, muli, dbnz, iflush): Enable for ms2 814 (jal, reti): Has JAL-HAZARD. 815 (ldctxt, ldfb, stfb): Only ms1. 816 (fbcb): Only ms1,ms1-003. 817 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, 818 fbcbincrs, mfbcbincrs): Enable for ms2. 819 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. 820 * ms1.opc (parse_loopsize): New. 821 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. 822 (print_pcrel): New. 823 8242005-10-28 Dave Brolley <brolley@redhat.com> 825 826 Contribute the following change: 827 2003-09-24 Dave Brolley <brolley@redhat.com> 828 829 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of 830 CGEN_ATTR_VALUE_TYPE. 831 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. 832 Use cgen_bitset_intersect_p. 833 8342005-10-27 DJ Delorie <dj@redhat.com> 835 836 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. 837 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, 838 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which 839 imm operand is needed. 840 (adjnz, sbjnz): Pass the right operands. 841 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, 842 unary-insn): Add -g variants for opcodes that need to support :G. 843 (not.BW:G, push.BW:G): Call it. 844 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, 845 stzx16-imm8-imm8-abs16): Fix operand typos. 846 * m32c.opc (m32c_asm_hash): Support bnCND. 847 (parse_signed4n, print_signed4n): New. 848 8492005-10-26 DJ Delorie <dj@redhat.com> 850 851 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. 852 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, 853 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): 854 dsp8[sp] is signed. 855 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). 856 (mov.BW:S r0,r1): Fix typo r1l->r1. 857 (tst): Allow :G suffix. 858 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. 859 8602005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 861 862 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. 863 8642005-10-25 DJ Delorie <dj@redhat.com> 865 866 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by 867 making one a macro of the other. 868 8692005-10-21 DJ Delorie <dj@redhat.com> 870 871 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. 872 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, 873 indexld, indexls): .w variants have `1' bit. 874 (rot32.b): QI, not SI. 875 (rot32.w): HI, not SI. 876 (xchg16): HI for .w variant. 877 8782005-10-19 Nick Clifton <nickc@redhat.com> 879 880 * m32r.opc (parse_slo16): Fix bad application of previous patch. 881 8822005-10-18 Andreas Schwab <schwab@suse.de> 883 884 * m32r.opc (parse_slo16): Better version of previous patch. 885 8862005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 887 888 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word 889 size. 890 8912005-07-25 DJ Delorie <dj@redhat.com> 892 893 * m32c.opc (parse_unsigned8): Add %dsp8(). 894 (parse_signed8): Add %hi8(). 895 (parse_unsigned16): Add %dsp16(). 896 (parse_signed16): Add %lo16() and %hi16(). 897 (parse_lab_5_3): Make valuep a bfd_vma *. 898 8992005-07-18 Nick Clifton <nickc@redhat.com> 900 901 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode 902 components. 903 (f-lab32-jmp-s): Fix insertion sequence. 904 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands. 905 (Dsp-40-s8): Make parameter be signed. 906 (Dsp-40-s16): Likewise. 907 (Dsp-48-s8): Likewise. 908 (Dsp-48-s16): Likewise. 909 (Imm-13-u3): Likewise. (Despite its name!) 910 (BitBase16-16-s8): Make the parameter be unsigned. 911 (BitBase16-8-u11-S): Likewise. 912 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s, 913 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow 914 relaxation. 915 916 * m32c.opc: Fix formatting. 917 Use safe-ctype.h instead of ctype.h 918 Move duplicated code sequences into a macro. 919 Fix compile time warnings about signedness mismatches. 920 Remove dead code. 921 (parse_lab_5_3): New parser function. 922 9232005-07-16 Jim Blandy <jimb@redhat.com> 924 925 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, 926 to represent isa sets. 927 9282005-07-15 Jim Blandy <jimb@redhat.com> 929 930 * m32c.cpu, m32c.opc: Fix copyright. 931 9322005-07-14 Jim Blandy <jimb@redhat.com> 933 934 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. 935 9362005-07-14 Alan Modra <amodra@bigpond.net.au> 937 938 * ms1.opc (print_dollarhex): Correct format string. 939 9402005-07-06 Alan Modra <amodra@bigpond.net.au> 941 942 * iq2000.cpu: Include from binutils cpu dir. 943 9442005-07-05 Nick Clifton <nickc@redhat.com> 945 946 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter 947 unsigned in order to avoid compile time warnings about sign 948 conflicts. 949 950 * ms1.opc (parse_*): Likewise. 951 (parse_imm16): Use a "void *" as it is passed both signed and 952 unsigned arguments. 953 9542005-07-01 Nick Clifton <nickc@redhat.com> 955 956 * frv.opc: Update to ISO C90 function declaration style. 957 * iq2000.opc: Likewise. 958 * m32r.opc: Likewise. 959 * sh.opc: Likewise. 960 9612005-06-15 Dave Brolley <brolley@redhat.com> 962 963 Contributed by Red Hat. 964 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox. 965 * ms1.opc: New file. Written by Stan Cox. 966 9672005-05-10 Nick Clifton <nickc@redhat.com> 968 969 * Update the address and phone number of the FSF organization in 970 the GPL notices in the following files: 971 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu, 972 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu, 973 sh64-media.cpu, simplify.inc 974 9752005-02-24 Alan Modra <amodra@bigpond.net.au> 976 977 * frv.opc (parse_A): Warning fix. 978 9792005-02-23 Nick Clifton <nickc@redhat.com> 980 981 * frv.opc: Fixed compile time warnings about differing signed'ness 982 of pointers passed to functions. 983 * m32r.opc: Likewise. 984 9852005-02-11 Nick Clifton <nickc@redhat.com> 986 987 * iq2000.opc (parse_jtargq10): Change type of valuep argument to 988 'bfd_vma *' in order avoid compile time warning message. 989 9902005-01-28 Hans-Peter Nilsson <hp@axis.com> 991 992 * cris.cpu (mstep): Add missing insn. 993 9942005-01-25 Alexandre Oliva <aoliva@redhat.com> 995 996 2004-11-10 Alexandre Oliva <aoliva@redhat.com> 997 * frv.cpu: Add support for TLS annotations in loads and calll. 998 * frv.opc (parse_symbolic_address): New. 999 (parse_ldd_annotation): New. 1000 (parse_call_annotation): New. 1001 (parse_ld_annotation): New. 1002 (parse_ulo16, parse_uslo16): Use parse_symbolic_address. 1003 Introduce TLS relocations. 1004 (parse_d12, parse_s12, parse_u12): Likewise. 1005 (parse_uhi16): Likewise. Fix constant checking on 64-bit host. 1006 (parse_call_label, print_at): New. 1007 10082004-12-21 Mikael Starvik <starvik@axis.com> 1009 1010 * cris.cpu (cris-set-mem): Correct integral write semantics. 1011 10122004-11-29 Hans-Peter Nilsson <hp@axis.com> 1013 1014 * cris.cpu: New file. 1015 10162004-11-15 Michael K. Lechner <mike.lechner@gmail.com> 1017 1018 * iq2000.cpu: Added quotes around macro arguments so that they 1019 will work with newer versions of guile. 1020 10212004-10-27 Nick Clifton <nickc@redhat.com> 1022 1023 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1, 1024 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index 1025 operand. 1026 * iq2000.cpu (dnop index): Rename to _index to avoid complications 1027 with guile. 1028 10292004-08-27 Richard Sandiford <rsandifo@redhat.com> 1030 1031 * frv.cpu (cfmovs): Change UNIT attribute to FMALL. 1032 10332004-05-15 Nick Clifton <nickc@redhat.com> 1034 1035 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const. 1036 10372004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 1038 1039 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug. 1040 10412004-03-01 Richard Sandiford <rsandifo@redhat.com> 1042 1043 * frv.cpu (define-arch frv): Add fr450 mach. 1044 (define-mach fr450): New. 1045 (define-model fr450): New. Add profile units to every fr450 insn. 1046 (define-attr UNIT): Add MDCUTSSI. 1047 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn. 1048 (define-attr AUDIO): New boolean. 1049 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL) 1050 (f-LRA-null, f-TLBPR-null): New fields. 1051 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr) 1052 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs. 1053 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands. 1054 (LRA-null, TLBPR-null): New macros. 1055 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr. 1056 (load-real-address): New macro. 1057 (lrai, lrad, tlbpr): New instructions. 1058 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument. 1059 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly. 1060 (mdcutssi): Change UNIT attribute to MDCUTSSI. 1061 (media-low-clear-semantics, media-scope-limit-semantics) 1062 (media-quad-limit, media-quad-shift): New macros. 1063 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions. 1064 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major) 1065 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn) 1066 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450. 1067 (fr450_unit_mapping): New array. 1068 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry 1069 for new MDCUTSSI unit. 1070 (fr450_check_insn_major_constraints): New function. 1071 (check_insn_major_constraints): Use it. 1072 10732004-03-01 Richard Sandiford <rsandifo@redhat.com> 1074 1075 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. 1076 (scutss): Change unit to I0. 1077 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. 1078 (mqsaths): Fix FR400-MAJOR categorization. 1079 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) 1080 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. 1081 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) 1082 combinations. 1083 10842004-03-01 Richard Sandiford <rsandifo@redhat.com> 1085 1086 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. 1087 (rstb, rsth, rst, rstd, rstq): Delete. 1088 (rstbf, rsthf, rstf, rstdf, rstqf): Delete. 1089 10902004-02-23 Nick Clifton <nickc@redhat.com> 1091 1092 * Apply these patches from Renesas: 1093 1094 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 1095 1096 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when 1097 disassembling codes for 0x*2 addresses. 1098 1099 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 1100 1101 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction. 1102 1103 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 1104 1105 * cpu/m32r.cpu : Add new model m32r2. 1106 Add new instructions. 1107 Replace occurrances of 'Mitsubishi' with 'Renesas'. 1108 Changed PIPE attr of push from O to OS. 1109 Care for Little-endian of M32R. 1110 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn): 1111 Care for Little-endian of M32R. 1112 (parse_slo16): signed extension for value. 1113 11142004-02-20 Andrew Cagney <cagney@redhat.com> 1115 1116 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick 1117 Clifton, Ben Elliston, Matthew Green, and Andrew Haley. 1118 1119 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all 1120 written by Ben Elliston. 1121 11222004-01-14 Richard Sandiford <rsandifo@redhat.com> 1123 1124 * frv.cpu (UNIT): Add IACC. 1125 (iacc-multiply-r-r): Use it. 1126 * frv.opc (fr400_unit_mapping): Add entry for IACC. 1127 (fr500_unit_mapping, fr550_unit_mapping): Likewise. 1128 11292004-01-06 Alexandre Oliva <aoliva@redhat.com> 1130 1131 2003-12-19 Alexandre Oliva <aoliva@redhat.com> 1132 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some 1133 cut&paste errors in shifting/truncating numerical operands. 1134 2003-08-08 Alexandre Oliva <aoliva@redhat.com> 1135 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo. 1136 (parse_uslo16): Likewise. 1137 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. 1138 (parse_d12): Parse gotoff12 and gotofffuncdesc12. 1139 (parse_s12): Likewise. 1140 2003-08-04 Alexandre Oliva <aoliva@redhat.com> 1141 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo. 1142 (parse_uslo16): Likewise. 1143 (parse_uhi16): Parse gothi and gotfuncdeschi. 1144 (parse_d12): Parse got12 and gotfuncdesc12. 1145 (parse_s12): Likewise. 1146 11472003-10-10 Dave Brolley <brolley@redhat.com> 1148 1149 * frv.cpu (dnpmop): New p-macro. 1150 (GRdoublek): Use dnpmop. 1151 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto. 1152 (store-double-r-r): Use (.sym regtype doublek). 1153 (r-store-double): Ditto. 1154 (store-double-r-r-u): Ditto. 1155 (conditional-store-double): Ditto. 1156 (conditional-store-double-u): Ditto. 1157 (store-double-r-simm): Ditto. 1158 (fmovs): Assign to UNIT FMALL. 1159 11602003-10-06 Dave Brolley <brolley@redhat.com> 1161 1162 * frv.cpu, frv.opc: Add support for fr550. 1163 11642003-09-24 Dave Brolley <brolley@redhat.com> 1165 1166 * frv.cpu (u-commit): New modelling unit for fr500. 1167 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand. 1168 (commit-r): Use u-commit model for fr500. 1169 (commit): Ditto. 1170 (conditional-float-binary-op): Take profiling data as an argument. 1171 Update callers. 1172 (ne-float-binary-op): Ditto. 1173 11742003-09-19 Michael Snyder <msnyder@redhat.com> 1175 1176 * frv.cpu (nldqi): Delete unimplemented instruction. 1177 11782003-09-12 Dave Brolley <brolley@redhat.com> 1179 1180 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500. 1181 (clear-ne-flag-r): Pass insn profiling in as an argument. Call 1182 frv_ref_SI to get input register referenced for profiling. 1183 (clear-ne-flag-all): Pass insn profiling in as an argument. 1184 (clrgr,clrfr,clrga,clrfa): Add profiling information. 1185 11862003-09-11 Michael Snyder <msnyder@redhat.com> 1187 1188 * frv.cpu: Typographical corrections. 1189 11902003-09-09 Dave Brolley <brolley@redhat.com> 1191 1192 * frv.cpu (media-dual-complex): Change UNIT to FMALL. 1193 (conditional-media-dual-complex, media-quad-complex): Likewise. 1194 11952003-09-04 Dave Brolley <brolley@redhat.com> 1196 1197 * frv.cpu (register-transfer): Pass in all attributes in on argument. 1198 Update all callers. 1199 (conditional-register-transfer): Ditto. 1200 (cache-preload): Ditto. 1201 (floating-point-conversion): Ditto. 1202 (floating-point-neg): Ditto. 1203 (float-abs): Ditto. 1204 (float-binary-op-s): Ditto. 1205 (conditional-float-binary-op): Ditto. 1206 (ne-float-binary-op): Ditto. 1207 (float-dual-arith): Ditto. 1208 (ne-float-dual-arith): Ditto. 1209 12102003-09-03 Dave Brolley <brolley@redhat.com> 1211 1212 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers. 1213 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC, 1214 MCLRACC-1. 1215 (A): Removed operand. 1216 (A0,A1): New operands replace operand A. 1217 (mnop): Now a real insn 1218 (mclracc): Removed insn. 1219 (mclracc-0, mclracc-1): New insns replace mclracc. 1220 (all insns): Use new UNIT attributes. 1221 12222003-08-21 Nick Clifton <nickc@redhat.com> 1223 1224 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand 1225 and u-media-dual-btoh with output parameter. 1226 (cmbtoh): Add profiling hack. 1227 12282003-08-19 Michael Snyder <msnyder@redhat.com> 1229 1230 * frv.cpu: Fix typo, Frintkeven -> FRintkeven 1231 12322003-06-10 Doug Evans <dje@sebabeach.org> 1233 1234 * frv.cpu: Add IDOC attribute. 1235 12362003-06-06 Andrew Cagney <cagney@redhat.com> 1237 1238 Contributed by Red Hat. 1239 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston, 1240 Stan Cox, and Frank Ch. Eigler. 1241 * iq2000.opc: New file. Written by Ben Elliston, Frank 1242 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox. 1243 * iq2000m.cpu: New file. Written by Jeff Johnston. 1244 * iq10.cpu: New file. Written by Jeff Johnston. 1245 12462003-06-05 Nick Clifton <nickc@redhat.com> 1247 1248 * frv.cpu (FRintieven): New operand. An even-numbered only 1249 version of the FRinti operand. 1250 (FRintjeven): Likewise for FRintj. 1251 (FRintkeven): Likewise for FRintk. 1252 (mdcutssi, media-dual-word-rotate-r-r, mqsaths, 1253 media-quad-arith-sat-semantics, media-quad-arith-sat, 1254 conditional-media-quad-arith-sat, mdunpackh, 1255 media-quad-multiply-semantics, media-quad-multiply, 1256 conditional-media-quad-multiply, media-quad-complex-i, 1257 media-quad-multiply-acc-semantics, media-quad-multiply-acc, 1258 conditional-media-quad-multiply-acc, munpackh, 1259 media-quad-multiply-cross-acc-semantics, mdpackh, 1260 media-quad-multiply-cross-acc, mbtoh-semantics, 1261 media-quad-cross-multiply-cross-acc-semantics, 1262 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics, 1263 media-quad-cross-multiply-acc-semantics, cmbtoh, 1264 media-quad-cross-multiply-acc, media-quad-complex, mhtob, 1265 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd, 1266 cmhtob): Use new operands. 1267 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define. 1268 (parse_even_register): New function. 1269 12702003-06-03 Nick Clifton <nickc@redhat.com> 1271 1272 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit 1273 immediate value not unsigned. 1274 12752003-06-03 Andrew Cagney <cagney@redhat.com> 1276 1277 Contributed by Red Hat. 1278 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore, 1279 and Eric Christopher. 1280 * frv.opc: New file. Written by Catherine Moore, and Dave 1281 Brolley. 1282 * simplify.inc: New file. Written by Doug Evans. 1283 12842003-05-02 Andrew Cagney <cagney@redhat.com> 1285 1286 * New file. 1287 1288 1289Copyright (C) 2003-2012 Free Software Foundation, Inc. 1290 1291Copying and distribution of this file, with or without modification, 1292are permitted in any medium without royalty provided the copyright 1293notice and this notice are preserved. 1294 1295Local Variables: 1296mode: change-log 1297left-margin: 8 1298fill-column: 74 1299version-control: never 1300End: 1301