xref: /netbsd-src/external/apache2/llvm/lib/libLLVMAArch64CodeGen/Makefile (revision 53d1339bf7f9c7367b35a9e1ebe693f9b047a47b)
1#	$NetBSD: Makefile,v 1.2 2021/05/30 01:56:50 joerg Exp $
2
3LIB=	LLVMAArch64CodeGen
4
5.include <bsd.init.mk>
6
7.PATH: ${LLVM_SRCDIR}/lib/Target/AArch64
8
9CPPFLAGS+=	-I${LLVM_SRCDIR}/lib/Target/AArch64
10
11SRCS+=	AArch64A53Fix835769.cpp \
12	AArch64A57FPLoadBalancing.cpp \
13	AArch64AdvSIMDScalarPass.cpp \
14	AArch64AsmPrinter.cpp \
15	AArch64BranchTargets.cpp \
16	AArch64CallingConvention.cpp \
17	AArch64CleanupLocalDynamicTLSPass.cpp \
18	AArch64CollectLOH.cpp \
19	AArch64CompressJumpTables.cpp \
20	AArch64CondBrTuning.cpp \
21	AArch64ConditionalCompares.cpp \
22	AArch64ConditionOptimizer.cpp \
23	AArch64DeadRegisterDefinitionsPass.cpp \
24	AArch64ExpandImm.cpp \
25	AArch64ExpandPseudoInsts.cpp \
26	AArch64FalkorHWPFFix.cpp \
27	AArch64FastISel.cpp \
28	AArch64FrameLowering.cpp \
29	AArch64InstrInfo.cpp \
30	AArch64ISelDAGToDAG.cpp \
31	AArch64ISelLowering.cpp \
32	AArch64LoadStoreOptimizer.cpp \
33	AArch64LowerHomogeneousPrologEpilog.cpp \
34	AArch64MachineFunctionInfo.cpp \
35	AArch64MacroFusion.cpp \
36	AArch64MCInstLower.cpp \
37	AArch64PBQPRegAlloc.cpp \
38	AArch64PromoteConstant.cpp \
39	AArch64RedundantCopyElimination.cpp \
40	AArch64RegisterInfo.cpp \
41	AArch64SelectionDAGInfo.cpp \
42	AArch64SIMDInstrOpt.cpp \
43	AArch64SLSHardening.cpp \
44	AArch64SpeculationHardening.cpp \
45	AArch64StackTagging.cpp \
46	AArch64StackTaggingPreRA.cpp \
47	AArch64StorePairSuppress.cpp \
48	AArch64Subtarget.cpp \
49	AArch64TargetMachine.cpp \
50	AArch64TargetObjectFile.cpp \
51	AArch64TargetTransformInfo.cpp \
52	SVEIntrinsicOpts.cpp
53
54.PATH: ${LLVM_SRCDIR}/lib/Target/AArch64/GISel
55
56SRCS+=	AArch64CallLowering.cpp \
57	AArch64GlobalISelUtils.cpp \
58	AArch64InstructionSelector.cpp \
59	AArch64LegalizerInfo.cpp \
60	AArch64O0PreLegalizerCombiner.cpp \
61	AArch64PostLegalizerCombiner.cpp \
62	AArch64PostLegalizerLowering.cpp \
63	AArch64PostSelectOptimize.cpp \
64	AArch64PreLegalizerCombiner.cpp \
65	AArch64RegisterBankInfo.cpp
66
67TABLEGEN_SRC=		AArch64.td
68TABLEGEN_INCLUDES=	-I${LLVM_SRCDIR}/lib/Target/AArch64
69TABLEGEN_OUTPUT= \
70	AArch64GenAsmMatcher.inc|-gen-asm-matcher \
71	AArch64GenAsmWriter1.inc|-gen-asm-writer^-asmwriternum=1 \
72	AArch64GenAsmWriter.inc|-gen-asm-writer \
73	AArch64GenCallingConv.inc|-gen-callingconv \
74	AArch64GenDAGISel.inc|-gen-dag-isel \
75	AArch64GenDisassemblerTables.inc|-gen-disassembler \
76	AArch64GenExegesis.inc|-gen-exegesis \
77	AArch64GenFastISel.inc|-gen-fast-isel \
78	AArch64GenGICombiner.inc|-gen-global-isel-combiner^-combiners=AArch64PreLegalizerCombinerHelper \
79	AArch64GenGlobalISel.inc|-gen-global-isel \
80	AArch64GenInstrInfo.inc|-gen-instr-info \
81	AArch64GenMCCodeEmitter.inc|-gen-emitter \
82	AArch64GenMCPseudoLowering.inc|-gen-pseudo-lowering \
83	AArch64GenO0PreLegalizeGICombiner.inc|-gen-global-isel-combiner^-combiners=AArch64O0PreLegalizerCombinerHelper \
84	AArch64GenPreLegalizeGICombiner.inc|-gen-global-isel-combiner^-combiners=AArch64PreLegalizerCombinerHelper \
85	AArch64GenPostLegalizeGICombiner.inc|-gen-global-isel-combiner^-combiners=AArch64PostLegalizerCombinerHelper \
86	AArch64GenPostLegalizeGILowering.inc|-gen-global-isel-combiner^-combiners=AArch64PostLegalizerLoweringHelper \
87	AArch64GenRegisterBank.inc|-gen-register-bank \
88	AArch64GenRegisterInfo.inc|-gen-register-info \
89	AArch64GenSubtargetInfo.inc|-gen-subtarget \
90	AArch64GenSystemOperands.inc|-gen-searchable-tables
91
92
93.include "${.PARSEDIR}/../../tablegen.mk"
94
95.if defined(HOSTLIB)
96.include <bsd.hostlib.mk>
97.else
98.include <bsd.lib.mk>
99.endif
100