1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64_be-linux-gnu -ffreestanding -emit-llvm -O0 -o - %s | FileCheck --check-prefix IR %s
3 // RUN: %clang_cc1 -triple aarch64_be-linux-gnu -ffreestanding -S -O1 -o - %s | FileCheck --check-prefix ARM %s
4
5 struct bt3 { signed b2:10; signed b3:10; } b16;
6
7 // Get the high 32-bits and then shift appropriately for big-endian.
callee_b0f(struct bt3 bp11)8 signed callee_b0f(struct bt3 bp11) {
9 // IR: callee_b0f(i64 [[ARG:%.*]])
10 // IR: store i64 [[ARG]], i64* [[PTR:%.*]]
11 // IR: [[BITCAST:%.*]] = bitcast i64* [[PTR]] to i8*
12 // IR: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}}, i8* [[BITCAST]], i64 4
13 // ARM: asr x0, x0, #54
14 return bp11.b2;
15 }
16