xref: /minix3/common/lib/libc/arch/arm/gen/neon_mask.S (revision 84d9c625bfea59e274550651111ae9edfdc40fbd)
1/*-
2 * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Matt Thomas of 3am Software Foundry.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <machine/asm.h>
31
32#ifdef _ARM_ARCH_7
33
34RCSID("$NetBSD: neon_mask.S,v 1.2 2012/12/18 06:14:23 matt Exp $")
35
36/*
37 * __neon_loading_qword_bitmask(size_t len);
38 *  IN	r0 = length of mask in bits
39 * OUT	q0 = mask
40 */
41ENTRY(__neon_leading_qword_bitmask)
42	cmp		r0, #64		/* which dword is partial? */
43#ifdef __ARMEL__
44	sublt		r0, r0, #64	/* 1st dword needs MSBs cleared */
45	subge		r1, r0, #128	/* 2nd dword needs MSBs cleared */
46#else
47	rsblt		r0, r0, #64	/* 1st dword needs LSBs cleared */
48	rsbge		r1, r0, #128	/* 2nd dword needs LSBs cleared */
49#endif
50	movge		r0, #0		/* 1st dword needs to left alone */
51	movlt		r1, #64		/* 2st dword needs to be cleared */
52	vmov		d2, r0, r1	/* move dword shifts to SIMD */
53	vmovl.u32	q1, d2		/* 2 U32 -> 2 U64 */
54	vmvn.u64	q0, #0		/* create a mask */
55	vshl.u64	q0, q0, q1	/* shift out unneeded bytes */
56	RET
57END(__neon_leading_qword_bitmask)
58
59#endif	/* _ARM_ARCH_7 */
60