xref: /minix3/common/lib/libc/arch/arm/atomic/membar_ops.S (revision 0a6a1f1d05b60e214de2f05a7310ddd1f0e590e7)
1/*	$NetBSD: membar_ops.S,v 1.6 2014/03/28 21:32:41 skrll Exp $	*/
2/*-
3 * Copyright (c) 2008 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas <matt@3am-software.com>
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include "atomic_op_asm.h"
32
33#ifdef _ARM_ARCH_6
34
35ENTRY_NP(_membar_producer)
36#ifdef _ARM_ARCH_7
37	dsb
38#else
39	mov	r0, #0
40	mcr	p15, 0, r0, c7, c10, 4	 /* Data Synchronization Barrier */
41#endif
42	RET
43END(_membar_producer)
44ATOMIC_OP_ALIAS(membar_producer,_membar_producer)
45ATOMIC_OP_ALIAS(membar_write,_membar_producer)
46STRONG_ALIAS(_membar_write,_membar_producer)
47
48ENTRY_NP(_membar_sync)
49#ifdef _ARM_ARCH_7
50	dmb
51#else
52	mov	r0, #0
53	mcr	p15, 0, r0, c7, c10, 5	/* Data Memory Barrier */
54#endif
55	RET
56END(_membar_sync)
57ATOMIC_OP_ALIAS(membar_sync,_membar_sync)
58ATOMIC_OP_ALIAS(membar_enter,_membar_sync)
59ATOMIC_OP_ALIAS(membar_exit,_membar_sync)
60ATOMIC_OP_ALIAS(membar_consumer,_membar_sync)
61ATOMIC_OP_ALIAS(membar_read,_membar_sync)
62CRT_ALIAS(__sync_synchronize,_membar_sync)
63STRONG_ALIAS(_membar_enter,_membar_sync)
64STRONG_ALIAS(_membar_exit,_membar_sync)
65STRONG_ALIAS(_membar_consumer,_membar_sync)
66STRONG_ALIAS(_membar_read,_membar_sync)
67
68#endif /* _ARM_ARCH_6 */
69