1// RUN: mlir-translate --mlir-to-llvmir %s | FileCheck %s 2 3// CHECK-LABEL: define <16 x float> @LLVM_x86_avx512_mask_ps_512 4llvm.func @LLVM_x86_avx512_mask_ps_512(%a: vector<16 x f32>, 5 %c: i16) 6 -> (vector<16 x f32>) 7{ 8 %b = llvm.mlir.constant(42 : i32) : i32 9 // CHECK: call <16 x float> @llvm.x86.avx512.mask.rndscale.ps.512(<16 x float> 10 %0 = "x86vector.avx512.intr.mask.rndscale.ps.512"(%a, %b, %a, %c, %b) : 11 (vector<16 x f32>, i32, vector<16 x f32>, i16, i32) -> vector<16 x f32> 12 // CHECK: call <16 x float> @llvm.x86.avx512.mask.scalef.ps.512(<16 x float> 13 %1 = "x86vector.avx512.intr.mask.scalef.ps.512"(%a, %a, %a, %c, %b) : 14 (vector<16 x f32>, vector<16 x f32>, vector<16 x f32>, i16, i32) -> vector<16 x f32> 15 llvm.return %1: vector<16 x f32> 16} 17 18// CHECK-LABEL: define <8 x double> @LLVM_x86_avx512_mask_pd_512 19llvm.func @LLVM_x86_avx512_mask_pd_512(%a: vector<8xf64>, 20 %c: i8) 21 -> (vector<8xf64>) 22{ 23 %b = llvm.mlir.constant(42 : i32) : i32 24 // CHECK: call <8 x double> @llvm.x86.avx512.mask.rndscale.pd.512(<8 x double> 25 %0 = "x86vector.avx512.intr.mask.rndscale.pd.512"(%a, %b, %a, %c, %b) : 26 (vector<8xf64>, i32, vector<8xf64>, i8, i32) -> vector<8xf64> 27 // CHECK: call <8 x double> @llvm.x86.avx512.mask.scalef.pd.512(<8 x double> 28 %1 = "x86vector.avx512.intr.mask.scalef.pd.512"(%a, %a, %a, %c, %b) : 29 (vector<8xf64>, vector<8xf64>, vector<8xf64>, i8, i32) -> vector<8xf64> 30 llvm.return %1: vector<8xf64> 31} 32 33// CHECK-LABEL: define <16 x float> @LLVM_x86_mask_compress 34llvm.func @LLVM_x86_mask_compress(%k: vector<16xi1>, %a: vector<16xf32>) 35 -> vector<16xf32> 36{ 37 // CHECK: call <16 x float> @llvm.x86.avx512.mask.compress.v16f32( 38 %0 = "x86vector.avx512.intr.mask.compress"(%a, %a, %k) : 39 (vector<16xf32>, vector<16xf32>, vector<16xi1>) -> vector<16xf32> 40 llvm.return %0 : vector<16xf32> 41} 42 43// CHECK-LABEL: define { <16 x i1>, <16 x i1> } @LLVM_x86_vp2intersect_d_512 44llvm.func @LLVM_x86_vp2intersect_d_512(%a: vector<16xi32>, %b: vector<16xi32>) 45 -> !llvm.struct<(vector<16 x i1>, vector<16 x i1>)> 46{ 47 // CHECK: call { <16 x i1>, <16 x i1> } @llvm.x86.avx512.vp2intersect.d.512(<16 x i32> 48 %0 = "x86vector.avx512.intr.vp2intersect.d.512"(%a, %b) : 49 (vector<16xi32>, vector<16xi32>) -> !llvm.struct<(vector<16 x i1>, vector<16 x i1>)> 50 llvm.return %0 : !llvm.struct<(vector<16 x i1>, vector<16 x i1>)> 51} 52 53// CHECK-LABEL: define { <8 x i1>, <8 x i1> } @LLVM_x86_vp2intersect_q_512 54llvm.func @LLVM_x86_vp2intersect_q_512(%a: vector<8xi64>, %b: vector<8xi64>) 55 -> !llvm.struct<(vector<8 x i1>, vector<8 x i1>)> 56{ 57 // CHECK: call { <8 x i1>, <8 x i1> } @llvm.x86.avx512.vp2intersect.q.512(<8 x i64> 58 %0 = "x86vector.avx512.intr.vp2intersect.q.512"(%a, %b) : 59 (vector<8xi64>, vector<8xi64>) -> !llvm.struct<(vector<8 x i1>, vector<8 x i1>)> 60 llvm.return %0 : !llvm.struct<(vector<8 x i1>, vector<8 x i1>)> 61} 62 63// CHECK-LABEL: define <4 x float> @LLVM_x86_avx512bf16_dpbf16ps_128 64llvm.func @LLVM_x86_avx512bf16_dpbf16ps_128( 65 %arg0: vector<4xf32>, %arg1: vector<8xbf16>, %arg2: vector<8xbf16> 66 ) -> vector<4xf32> 67{ 68 // CHECK: call <4 x float> @llvm.x86.avx512bf16.dpbf16ps.128( 69 %0 = "x86vector.avx512.intr.dpbf16ps.128"(%arg0, %arg1, %arg2) 70 : (vector<4xf32>, vector<8xbf16>, vector<8xbf16>) -> vector<4xf32> 71 llvm.return %0 : vector<4xf32> 72} 73 74// CHECK-LABEL: define <8 x float> @LLVM_x86_avx512bf16_dpbf16ps_256 75llvm.func @LLVM_x86_avx512bf16_dpbf16ps_256( 76 %arg0: vector<8xf32>, %arg1: vector<16xbf16>, %arg2: vector<16xbf16> 77 ) -> vector<8xf32> 78{ 79 // CHECK: call <8 x float> @llvm.x86.avx512bf16.dpbf16ps.256( 80 %0 = "x86vector.avx512.intr.dpbf16ps.256"(%arg0, %arg1, %arg2) 81 : (vector<8xf32>, vector<16xbf16>, vector<16xbf16>) -> vector<8xf32> 82 llvm.return %0 : vector<8xf32> 83} 84 85// CHECK-LABEL: define <16 x float> @LLVM_x86_avx512bf16_dpbf16ps_512 86llvm.func @LLVM_x86_avx512bf16_dpbf16ps_512( 87 %arg0: vector<16xf32>, %arg1: vector<32xbf16>, %arg2: vector<32xbf16> 88 ) -> vector<16xf32> 89{ 90 // CHECK: call <16 x float> @llvm.x86.avx512bf16.dpbf16ps.512( 91 %0 = "x86vector.avx512.intr.dpbf16ps.512"(%arg0, %arg1, %arg2) 92 : (vector<16xf32>, vector<32xbf16>, vector<32xbf16>) -> vector<16xf32> 93 llvm.return %0 : vector<16xf32> 94} 95 96// CHECK-LABEL: define <8 x float> @LLVM_x86_avx_rsqrt_ps_256 97llvm.func @LLVM_x86_avx_rsqrt_ps_256(%a: vector <8xf32>) -> vector<8xf32> 98{ 99 // CHECK: call <8 x float> @llvm.x86.avx.rsqrt.ps.256(<8 x float> 100 %0 = "x86vector.avx.intr.rsqrt.ps.256"(%a) : (vector<8xf32>) -> (vector<8xf32>) 101 llvm.return %0 : vector<8xf32> 102} 103 104// CHECK-LABEL: define <8 x float> @LLVM_x86_avx_dp_ps_256 105llvm.func @LLVM_x86_avx_dp_ps_256( 106 %arg0: vector<8xf32>, %arg1: vector<8xf32> 107 ) -> vector<8xf32> 108{ 109 // CHECK: call <8 x float> @llvm.x86.avx.dp.ps.256( 110 %0 = llvm.mlir.constant(-1 : i8) : i8 111 %1 = "x86vector.avx.intr.dp.ps.256"(%arg0, %arg1, %0) : (vector<8xf32>, vector<8xf32>, i8) -> vector<8xf32> 112 llvm.return %1 : vector<8xf32> 113} 114