1; RUN: mlir-translate -import-llvm -split-input-file %s | FileCheck %s 2 3; Test the default data layout import. 4 5; CHECK: dlti.dl_spec = 6; CHECK: #dlti.dl_spec< 7; CHECK-DAG: "dlti.endianness" = "little" 8; CHECK-DAG: i1 = dense<8> : vector<2xi64> 9; CHECK-DAG: i8 = dense<8> : vector<2xi64> 10; CHECK-DAG: i16 = dense<16> : vector<2xi64> 11; CHECK-DAG: i32 = dense<32> : vector<2xi64> 12; CHECK-DAG: i64 = dense<[32, 64]> : vector<2xi64> 13; CHECK-DAG: !llvm.ptr = dense<64> : vector<4xi64> 14; CHECK-DAG: f16 = dense<16> : vector<2xi64> 15; CHECK-DAG: f64 = dense<64> : vector<2xi64> 16; CHECK-DAG: f128 = dense<128> : vector<2xi64> 17; CHECK: > 18target datalayout = "" 19 20; // ----- 21 22; CHECK: dlti.dl_spec = 23; CHECK: #dlti.dl_spec< 24; CHECK-DAG: "dlti.endianness" = "little" 25; CHECK-DAG: i64 = dense<64> : vector<2xi64> 26; CHECK-DAG: f80 = dense<128> : vector<2xi64> 27; CHECK-DAG: i8 = dense<8> : vector<2xi64> 28; CHECK-DAG: !llvm.ptr<270> = dense<[32, 64, 64, 32]> : vector<4xi64> 29; CHECK-DAG: !llvm.ptr<271> = dense<32> : vector<4xi64> 30; CHECK-DAG: !llvm.ptr<272> = dense<64> : vector<4xi64> 31; CHECK-DAG: "dlti.stack_alignment" = 128 : i64 32target datalayout = "e-m:e-p270:32:64-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" 33 34; // ----- 35 36; CHECK: dlti.dl_spec = 37; CHECK: #dlti.dl_spec< 38; CHECK-DAG: "dlti.endianness" = "big" 39; CHECK-DAG: !llvm.ptr<270> = dense<[16, 32, 64, 8]> : vector<4xi64> 40; CHECK-DAG: !llvm.ptr<271> = dense<[16, 32, 64, 16]> : vector<4xi64> 41; CHECK-DAG: "dlti.alloca_memory_space" = 1 : ui64 42; CHECK-DAG: i64 = dense<[64, 128]> : vector<2xi64> 43target datalayout = "A1-E-p270:16:32:64:8-p271:16:32:64-i64:64:128" 44 45; // ----- 46 47; CHECK: dlti.dl_spec = 48; CHECK: #dlti.dl_spec< 49; CHECK-NOT: "dlti.alloca_memory_space" = 50target datalayout = "A0" 51