xref: /llvm-project/mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir (revision 41f3b83fb066b4c3273e9abe02a8630864f22f30)
1// RUN: mlir-opt -convert-spirv-to-llvm %s | FileCheck %s
2
3//===----------------------------------------------------------------------===//
4// spirv.IAdd
5//===----------------------------------------------------------------------===//
6
7// CHECK-LABEL: @iadd_scalar
8spirv.func @iadd_scalar(%arg0: i32, %arg1: i32) "None" {
9  // CHECK: llvm.add %{{.*}}, %{{.*}} : i32
10  %0 = spirv.IAdd %arg0, %arg1 : i32
11  spirv.Return
12}
13
14// CHECK-LABEL: @iadd_vector
15spirv.func @iadd_vector(%arg0: vector<4xi64>, %arg1: vector<4xi64>) "None" {
16  // CHECK: llvm.add %{{.*}}, %{{.*}} : vector<4xi64>
17  %0 = spirv.IAdd %arg0, %arg1 : vector<4xi64>
18  spirv.Return
19}
20
21//===----------------------------------------------------------------------===//
22// spirv.ISub
23//===----------------------------------------------------------------------===//
24
25// CHECK-LABEL: @isub_scalar
26spirv.func @isub_scalar(%arg0: i8, %arg1: i8) "None" {
27  // CHECK: llvm.sub %{{.*}}, %{{.*}} : i8
28  %0 = spirv.ISub %arg0, %arg1 : i8
29  spirv.Return
30}
31
32// CHECK-LABEL: @isub_vector
33spirv.func @isub_vector(%arg0: vector<2xi16>, %arg1: vector<2xi16>) "None" {
34  // CHECK: llvm.sub %{{.*}}, %{{.*}} : vector<2xi16>
35  %0 = spirv.ISub %arg0, %arg1 : vector<2xi16>
36  spirv.Return
37}
38
39//===----------------------------------------------------------------------===//
40// spirv.IMul
41//===----------------------------------------------------------------------===//
42
43// CHECK-LABEL: @imul_scalar
44spirv.func @imul_scalar(%arg0: i32, %arg1: i32) "None" {
45  // CHECK: llvm.mul %{{.*}}, %{{.*}} : i32
46  %0 = spirv.IMul %arg0, %arg1 : i32
47  spirv.Return
48}
49
50// CHECK-LABEL: @imul_vector
51spirv.func @imul_vector(%arg0: vector<3xi32>, %arg1: vector<3xi32>) "None" {
52  // CHECK: llvm.mul %{{.*}}, %{{.*}} : vector<3xi32>
53  %0 = spirv.IMul %arg0, %arg1 : vector<3xi32>
54  spirv.Return
55}
56
57//===----------------------------------------------------------------------===//
58// spirv.FAdd
59//===----------------------------------------------------------------------===//
60
61// CHECK-LABEL: @fadd_scalar
62spirv.func @fadd_scalar(%arg0: f16, %arg1: f16) "None" {
63  // CHECK: llvm.fadd %{{.*}}, %{{.*}} : f16
64  %0 = spirv.FAdd %arg0, %arg1 : f16
65  spirv.Return
66}
67
68// CHECK-LABEL: @fadd_vector
69spirv.func @fadd_vector(%arg0: vector<4xf32>, %arg1: vector<4xf32>) "None" {
70  // CHECK: llvm.fadd %{{.*}}, %{{.*}} : vector<4xf32>
71  %0 = spirv.FAdd %arg0, %arg1 : vector<4xf32>
72  spirv.Return
73}
74
75//===----------------------------------------------------------------------===//
76// spirv.FSub
77//===----------------------------------------------------------------------===//
78
79// CHECK-LABEL: @fsub_scalar
80spirv.func @fsub_scalar(%arg0: f32, %arg1: f32) "None" {
81  // CHECK: llvm.fsub %{{.*}}, %{{.*}} : f32
82  %0 = spirv.FSub %arg0, %arg1 : f32
83  spirv.Return
84}
85
86// CHECK-LABEL: @fsub_vector
87spirv.func @fsub_vector(%arg0: vector<2xf32>, %arg1: vector<2xf32>) "None" {
88  // CHECK: llvm.fsub %{{.*}}, %{{.*}} : vector<2xf32>
89  %0 = spirv.FSub %arg0, %arg1 : vector<2xf32>
90  spirv.Return
91}
92
93//===----------------------------------------------------------------------===//
94// spirv.FDiv
95//===----------------------------------------------------------------------===//
96
97// CHECK-LABEL: @fdiv_scalar
98spirv.func @fdiv_scalar(%arg0: f32, %arg1: f32) "None" {
99  // CHECK: llvm.fdiv %{{.*}}, %{{.*}} : f32
100  %0 = spirv.FDiv %arg0, %arg1 : f32
101  spirv.Return
102}
103
104// CHECK-LABEL: @fdiv_vector
105spirv.func @fdiv_vector(%arg0: vector<3xf64>, %arg1: vector<3xf64>) "None" {
106  // CHECK: llvm.fdiv %{{.*}}, %{{.*}} : vector<3xf64>
107  %0 = spirv.FDiv %arg0, %arg1 : vector<3xf64>
108  spirv.Return
109}
110
111//===----------------------------------------------------------------------===//
112// spirv.FMul
113//===----------------------------------------------------------------------===//
114
115// CHECK-LABEL: @fmul_scalar
116spirv.func @fmul_scalar(%arg0: f32, %arg1: f32) "None" {
117  // CHECK: llvm.fmul %{{.*}}, %{{.*}} : f32
118  %0 = spirv.FMul %arg0, %arg1 : f32
119  spirv.Return
120}
121
122// CHECK-LABEL: @fmul_vector
123spirv.func @fmul_vector(%arg0: vector<2xf32>, %arg1: vector<2xf32>) "None" {
124  // CHECK: llvm.fmul %{{.*}}, %{{.*}} : vector<2xf32>
125  %0 = spirv.FMul %arg0, %arg1 : vector<2xf32>
126  spirv.Return
127}
128
129//===----------------------------------------------------------------------===//
130// spirv.FRem
131//===----------------------------------------------------------------------===//
132
133// CHECK-LABEL: @frem_scalar
134spirv.func @frem_scalar(%arg0: f32, %arg1: f32) "None" {
135  // CHECK: llvm.frem %{{.*}}, %{{.*}} : f32
136  %0 = spirv.FRem %arg0, %arg1 : f32
137  spirv.Return
138}
139
140// CHECK-LABEL: @frem_vector
141spirv.func @frem_vector(%arg0: vector<3xf64>, %arg1: vector<3xf64>) "None" {
142  // CHECK: llvm.frem %{{.*}}, %{{.*}} : vector<3xf64>
143  %0 = spirv.FRem %arg0, %arg1 : vector<3xf64>
144  spirv.Return
145}
146
147//===----------------------------------------------------------------------===//
148// spirv.FNegate
149//===----------------------------------------------------------------------===//
150
151// CHECK-LABEL: @fneg_scalar
152spirv.func @fneg_scalar(%arg: f64) "None" {
153  // CHECK: llvm.fneg %{{.*}} : f64
154  %0 = spirv.FNegate %arg : f64
155  spirv.Return
156}
157
158// CHECK-LABEL: @fneg_vector
159spirv.func @fneg_vector(%arg: vector<2xf32>) "None" {
160  // CHECK: llvm.fneg %{{.*}} : vector<2xf32>
161  %0 = spirv.FNegate %arg : vector<2xf32>
162  spirv.Return
163}
164
165//===----------------------------------------------------------------------===//
166// spirv.UDiv
167//===----------------------------------------------------------------------===//
168
169// CHECK-LABEL: @udiv_scalar
170spirv.func @udiv_scalar(%arg0: i32, %arg1: i32) "None" {
171  // CHECK: llvm.udiv %{{.*}}, %{{.*}} : i32
172  %0 = spirv.UDiv %arg0, %arg1 : i32
173  spirv.Return
174}
175
176// CHECK-LABEL: @udiv_vector
177spirv.func @udiv_vector(%arg0: vector<3xi64>, %arg1: vector<3xi64>) "None" {
178  // CHECK: llvm.udiv %{{.*}}, %{{.*}} : vector<3xi64>
179  %0 = spirv.UDiv %arg0, %arg1 : vector<3xi64>
180  spirv.Return
181}
182
183//===----------------------------------------------------------------------===//
184// spirv.UMod
185//===----------------------------------------------------------------------===//
186
187// CHECK-LABEL: @umod_scalar
188spirv.func @umod_scalar(%arg0: i32, %arg1: i32) "None" {
189  // CHECK: llvm.urem %{{.*}}, %{{.*}} : i32
190  %0 = spirv.UMod %arg0, %arg1 : i32
191  spirv.Return
192}
193
194// CHECK-LABEL: @umod_vector
195spirv.func @umod_vector(%arg0: vector<3xi64>, %arg1: vector<3xi64>) "None" {
196  // CHECK: llvm.urem %{{.*}}, %{{.*}} : vector<3xi64>
197  %0 = spirv.UMod %arg0, %arg1 : vector<3xi64>
198  spirv.Return
199}
200
201//===----------------------------------------------------------------------===//
202// spirv.SDiv
203//===----------------------------------------------------------------------===//
204
205// CHECK-LABEL: @sdiv_scalar
206spirv.func @sdiv_scalar(%arg0: i16, %arg1: i16) "None" {
207  // CHECK: llvm.sdiv %{{.*}}, %{{.*}} : i16
208  %0 = spirv.SDiv %arg0, %arg1 : i16
209  spirv.Return
210}
211
212// CHECK-LABEL: @sdiv_vector
213spirv.func @sdiv_vector(%arg0: vector<2xi64>, %arg1: vector<2xi64>) "None" {
214  // CHECK: llvm.sdiv %{{.*}}, %{{.*}} : vector<2xi64>
215  %0 = spirv.SDiv %arg0, %arg1 : vector<2xi64>
216  spirv.Return
217}
218
219//===----------------------------------------------------------------------===//
220// spirv.SRem
221//===----------------------------------------------------------------------===//
222
223// CHECK-LABEL: @srem_scalar
224spirv.func @srem_scalar(%arg0: i32, %arg1: i32) "None" {
225  // CHECK: llvm.srem %{{.*}}, %{{.*}} : i32
226  %0 = spirv.SRem %arg0, %arg1 : i32
227  spirv.Return
228}
229
230// CHECK-LABEL: @srem_vector
231spirv.func @srem_vector(%arg0: vector<4xi32>, %arg1: vector<4xi32>) "None" {
232  // CHECK: llvm.srem %{{.*}}, %{{.*}} : vector<4xi32>
233  %0 = spirv.SRem %arg0, %arg1 : vector<4xi32>
234  spirv.Return
235}
236