1 //===- ModuleToObject.h - Module to object base class -----------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file declares the base class for transforming operations into binary 10 // objects. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef MLIR_TARGET_LLVM_MODULETOOBJECT_H 15 #define MLIR_TARGET_LLVM_MODULETOOBJECT_H 16 17 #include "mlir/IR/Operation.h" 18 #include "llvm/IR/Module.h" 19 20 namespace llvm { 21 class TargetMachine; 22 } // namespace llvm 23 24 namespace mlir { 25 namespace LLVM { 26 class ModuleTranslation; 27 /// Utility base class for transforming operations into binary objects, by 28 /// default it returns the serialized LLVM bitcode for the module. The 29 /// operations being transformed must be translatable into LLVM IR. 30 class ModuleToObject { 31 public: 32 ModuleToObject( 33 Operation &module, StringRef triple, StringRef chip, 34 StringRef features = {}, int optLevel = 3, 35 function_ref<void(llvm::Module &)> initialLlvmIRCallback = {}, 36 function_ref<void(llvm::Module &)> linkedLlvmIRCallback = {}, 37 function_ref<void(llvm::Module &)> optimizedLlvmIRCallback = {}, 38 function_ref<void(StringRef)> isaCallback = {}); 39 virtual ~ModuleToObject(); 40 41 /// Returns the operation being serialized. 42 Operation &getOperation(); 43 44 /// Runs the serialization pipeline, returning `std::nullopt` on error. 45 virtual std::optional<SmallVector<char, 0>> run(); 46 47 protected: 48 // Hooks to be implemented by derived classes. 49 50 /// Hook for computing the Datalayout 51 virtual void setDataLayoutAndTriple(llvm::Module &module); 52 53 /// Hook for loading bitcode files, returns std::nullopt on failure. 54 virtual std::optional<SmallVector<std::unique_ptr<llvm::Module>>> 55 loadBitcodeFiles(llvm::Module &module) { 56 return SmallVector<std::unique_ptr<llvm::Module>>(); 57 } 58 59 /// Hook for performing additional actions on a loaded bitcode file. 60 virtual LogicalResult handleBitcodeFile(llvm::Module &module) { 61 return success(); 62 } 63 64 /// Hook for performing additional actions on the llvmModule pre linking. 65 virtual void handleModulePreLink(llvm::Module &module) {} 66 67 /// Hook for performing additional actions on the llvmModule post linking. 68 virtual void handleModulePostLink(llvm::Module &module) {} 69 70 /// Serializes the LLVM IR bitcode to an object file, by default it serializes 71 /// to LLVM bitcode. 72 virtual std::optional<SmallVector<char, 0>> 73 moduleToObject(llvm::Module &llvmModule); 74 75 protected: 76 /// Create the target machine based on the target triple and chip. 77 /// This can fail if the target is not available. 78 std::optional<llvm::TargetMachine *> getOrCreateTargetMachine(); 79 80 /// Loads a bitcode file from path. 81 std::unique_ptr<llvm::Module> loadBitcodeFile(llvm::LLVMContext &context, 82 StringRef path); 83 84 /// Loads multiple bitcode files. 85 LogicalResult loadBitcodeFilesFromList( 86 llvm::LLVMContext &context, ArrayRef<Attribute> librariesToLink, 87 SmallVector<std::unique_ptr<llvm::Module>> &llvmModules, 88 bool failureOnError = true); 89 90 /// Translates the operation to LLVM IR. 91 std::unique_ptr<llvm::Module> 92 translateToLLVMIR(llvm::LLVMContext &llvmContext); 93 94 /// Link the llvmModule to other bitcode file. 95 LogicalResult linkFiles(llvm::Module &module, 96 SmallVector<std::unique_ptr<llvm::Module>> &&libs); 97 98 /// Optimize the module. 99 virtual LogicalResult optimizeModule(llvm::Module &module, int optL); 100 101 /// Utility function for translating to ISA, returns `std::nullopt` on 102 /// failure. 103 static std::optional<std::string> 104 translateToISA(llvm::Module &llvmModule, llvm::TargetMachine &targetMachine); 105 106 protected: 107 /// Module to transform to a binary object. 108 Operation &module; 109 110 /// Target triple. 111 StringRef triple; 112 113 /// Target chip. 114 StringRef chip; 115 116 /// Target features. 117 StringRef features; 118 119 /// Optimization level. 120 int optLevel; 121 122 /// Callback invoked with the initial LLVM IR for the device module. 123 function_ref<void(llvm::Module &)> initialLlvmIRCallback; 124 125 /// Callback invoked with LLVM IR for the device module after 126 /// linking the device libraries. 127 function_ref<void(llvm::Module &)> linkedLlvmIRCallback; 128 129 /// Callback invoked with LLVM IR for the device module after 130 /// LLVM optimizations but before codegen. 131 function_ref<void(llvm::Module &)> optimizedLlvmIRCallback; 132 133 /// Callback invoked with the target ISA for the device, 134 /// for example PTX assembly. 135 function_ref<void(StringRef)> isaCallback; 136 137 private: 138 /// The TargetMachine created for the given Triple, if available. 139 /// Accessible through `getOrCreateTargetMachine()`. 140 std::unique_ptr<llvm::TargetMachine> targetMachine; 141 }; 142 } // namespace LLVM 143 } // namespace mlir 144 145 #endif // MLIR_TARGET_LLVM_MODULETOOBJECT_H 146