xref: /llvm-project/llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp (revision 4e8c9d28132039a98feb97cec2759cddeb37d934)
1 //===- WebAssemblyDisassemblerEmitter.cpp - Disassembler tables -*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file is part of the WebAssembly Disassembler Emitter.
10 // It contains the implementation of the disassembler tables.
11 // Documentation for the disassembler emitter in general can be found in
12 // WebAssemblyDisassemblerEmitter.h.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #include "WebAssemblyDisassemblerEmitter.h"
17 #include "Common/CodeGenInstruction.h"
18 #include "llvm/ADT/STLExtras.h"
19 #include "llvm/Support/raw_ostream.h"
20 #include "llvm/TableGen/Record.h"
21 
22 static constexpr int WebAssemblyInstructionTableSize = 256;
23 
24 void llvm::emitWebAssemblyDisassemblerTables(
25     raw_ostream &OS,
26     ArrayRef<const CodeGenInstruction *> NumberedInstructions) {
27   // First lets organize all opcodes by (prefix) byte. Prefix 0 is the
28   // starting table.
29   std::map<unsigned,
30            std::map<unsigned, std::pair<unsigned, const CodeGenInstruction *>>>
31       OpcodeTable;
32   for (unsigned I = 0; I != NumberedInstructions.size(); ++I) {
33     const CodeGenInstruction &CGI = *NumberedInstructions[I];
34     const Record &Def = *CGI.TheDef;
35     if (!Def.getValue("Inst"))
36       continue;
37     const BitsInit &Inst = *Def.getValueAsBitsInit("Inst");
38     unsigned Opc = static_cast<unsigned>(*Inst.convertInitializerToInt());
39     if (Opc == 0xFFFFFFFF)
40       continue; // No opcode defined.
41     assert(Opc <= 0xFFFFFF);
42     unsigned Prefix;
43     if (Opc <= 0xFFFF) {
44       Prefix = Opc >> 8;
45       Opc = Opc & 0xFF;
46     } else {
47       Prefix = Opc >> 16;
48       Opc = Opc & 0xFFFF;
49     }
50     auto &CGIP = OpcodeTable[Prefix][Opc];
51     // All wasm instructions have a StackBased field of type string, we only
52     // want the instructions for which this is "true".
53     bool IsStackBased = Def.getValueAsBit("StackBased");
54     if (!IsStackBased)
55       continue;
56     if (CGIP.second) {
57       // We already have an instruction for this slot, so decide which one
58       // should be the canonical one. This determines which variant gets
59       // printed in a disassembly. We want e.g. "call" not "i32.call", and
60       // "end" when we don't know if its "end_loop" or "end_block" etc.
61       bool IsCanonicalExisting =
62           CGIP.second->TheDef->getValueAsBit("IsCanonical");
63       // We already have one marked explicitly as canonical, so keep it.
64       if (IsCanonicalExisting)
65         continue;
66       bool IsCanonicalNew = Def.getValueAsBit("IsCanonical");
67       // If the new one is explicitly marked as canonical, take it.
68       if (!IsCanonicalNew) {
69         // Neither the existing or new instruction is canonical.
70         // Pick the one with the shortest name as heuristic.
71         // Though ideally IsCanonical is always defined for at least one
72         // variant so this never has to apply.
73         if (CGIP.second->AsmString.size() <= CGI.AsmString.size())
74           continue;
75       }
76     }
77     // Set this instruction as the one to use.
78     CGIP = {I, &CGI};
79   }
80   OS << "#include \"MCTargetDesc/WebAssemblyMCTargetDesc.h\"\n";
81   OS << "\n";
82   OS << "namespace llvm {\n\n";
83   OS << "static constexpr int WebAssemblyInstructionTableSize = ";
84   OS << WebAssemblyInstructionTableSize << ";\n\n";
85   OS << "enum EntryType : uint8_t { ";
86   OS << "ET_Unused, ET_Prefix, ET_Instruction };\n\n";
87   OS << "struct WebAssemblyInstruction {\n";
88   OS << "  uint16_t Opcode;\n";
89   OS << "  EntryType ET;\n";
90   OS << "  uint8_t NumOperands;\n";
91   OS << "  uint16_t OperandStart;\n";
92   OS << "};\n\n";
93   std::vector<std::string> OperandTable, CurOperandList;
94   // Output one table per prefix.
95   for (const auto &[Prefix, Table] : OpcodeTable) {
96     if (Table.empty())
97       continue;
98     OS << "WebAssemblyInstruction InstructionTable" << Prefix;
99     OS << "[] = {\n";
100     for (unsigned I = 0; I < WebAssemblyInstructionTableSize; I++) {
101       auto InstIt = Table.find(I);
102       if (InstIt != Table.end()) {
103         // Regular instruction.
104         assert(InstIt->second.second);
105         auto &CGI = *InstIt->second.second;
106         OS << "  // 0x";
107         OS.write_hex(static_cast<unsigned long long>(I));
108         OS << ": " << CGI.AsmString << "\n";
109         OS << "  { " << InstIt->second.first << ", ET_Instruction, ";
110         OS << CGI.Operands.OperandList.size() << ", ";
111         // Collect operand types for storage in a shared list.
112         CurOperandList.clear();
113         for (auto &Op : CGI.Operands.OperandList) {
114           assert(Op.OperandType != "MCOI::OPERAND_UNKNOWN");
115           CurOperandList.push_back(Op.OperandType);
116         }
117         // See if we already have stored this sequence before. This is not
118         // strictly necessary but makes the table really small.
119         size_t OperandStart = OperandTable.size();
120         if (CurOperandList.size() <= OperandTable.size()) {
121           for (size_t J = 0; J <= OperandTable.size() - CurOperandList.size();
122                ++J) {
123             size_t K = 0;
124             for (; K < CurOperandList.size(); ++K) {
125               if (OperandTable[J + K] != CurOperandList[K])
126                 break;
127             }
128             if (K == CurOperandList.size()) {
129               OperandStart = J;
130               break;
131             }
132           }
133         }
134         // Store operands if no prior occurrence.
135         if (OperandStart == OperandTable.size()) {
136           llvm::append_range(OperandTable, CurOperandList);
137         }
138         OS << OperandStart;
139       } else {
140         auto PrefixIt = OpcodeTable.find(I);
141         // If we have a non-empty table for it that's not 0, this is a prefix.
142         if (PrefixIt != OpcodeTable.end() && I && !Prefix) {
143           OS << "  { 0, ET_Prefix, 0, 0";
144         } else {
145           OS << "  { 0, ET_Unused, 0, 0";
146         }
147       }
148       OS << "  },\n";
149     }
150     OS << "};\n\n";
151   }
152   // Create a table of all operands:
153   OS << "const uint8_t OperandTable[] = {\n";
154   for (auto &Op : OperandTable) {
155     OS << "  " << Op << ",\n";
156   }
157   OS << "};\n\n";
158   // Create a table of all extension tables:
159   OS << "struct { uint8_t Prefix; const WebAssemblyInstruction *Table; }\n";
160   OS << "PrefixTable[] = {\n";
161   for (const auto &[Prefix, Table] : OpcodeTable) {
162     if (Table.empty() || !Prefix)
163       continue;
164     OS << "  { " << Prefix << ", InstructionTable" << Prefix << " },\n";
165   }
166   OS << "  { 0, nullptr }\n};\n\n";
167   OS << "} // end namespace llvm\n";
168 }
169