1; RUN: llvm-reduce --abort-on-invalid-reduction --delta-passes=opcodes --test FileCheck --test-arg %s --test-arg --input-file %s -o %t 2; RUN: FileCheck -check-prefixes=CHECK,RESULT %s < %t 3 4; CHECK-LABEL: @fdiv_fast( 5; RESULT-NEXT: %op = fmul fast float %a, %b, !dbg !7, !fpmath !13 6; RESULT-NEXT: ret float %op 7define float @fdiv_fast(float %a, float %b) { 8 %op = fdiv fast float %a, %b, !dbg !7, !fpmath !13 9 ret float %op 10} 11 12; CHECK-LABEL: @frem_nnan( 13; RESULT-NEXT: %op = fmul nnan float %a, %b, !dbg !7, !fpmath !13 14; RESULT-NEXT: ret float %op 15define float @frem_nnan(float %a, float %b) { 16 %op = frem nnan float %a, %b, !dbg !7, !fpmath !13 17 ret float %op 18} 19 20; CHECK-LABEL: @udiv( 21; RESULT-NEXT: %op = mul i32 %a, %b, !dbg !7 22; RESULT-NEXT: ret i32 %op 23define i32 @udiv(i32 %a, i32 %b) { 24 %op = udiv i32 %a, %b, !dbg !7 25 ret i32 %op 26} 27 28; CHECK-LABEL: @udiv_vec( 29; RESULT-NEXT: %op = mul <2 x i32> %a, %b, !dbg !7 30; RESULT-NEXT: ret <2 x i32> %op 31define <2 x i32> @udiv_vec(<2 x i32> %a, <2 x i32> %b) { 32 %op = udiv <2 x i32> %a, %b, !dbg !7 33 ret <2 x i32> %op 34} 35 36; CHECK-LABEL: @sdiv( 37; RESULT-NEXT: %op = mul i32 %a, %b{{$}} 38; RESULT-NEXT: ret i32 %op 39define i32 @sdiv(i32 %a, i32 %b) { 40 %op = sdiv i32 %a, %b 41 ret i32 %op 42} 43 44; CHECK-LABEL: @sdiv_exact( 45; RESULT-NEXT: %op = mul i32 %a, %b, !dbg !7 46; RESULT-NEXT: ret 47define i32 @sdiv_exact(i32 %a, i32 %b) { 48 %op = sdiv exact i32 %a, %b, !dbg !7 49 ret i32 %op 50} 51 52; CHECK-LABEL: @urem( 53; RESULT-NEXT: %op = mul i32 %a, %b, !dbg !7 54; RESULT-NEXT: ret 55define i32 @urem(i32 %a, i32 %b) { 56 %op = urem i32 %a, %b, !dbg !7 57 ret i32 %op 58} 59 60; CHECK-LABEL: @srem( 61; RESULT-NEXT: %op = mul i32 %a, %b, !dbg !7 62; RESULT-NEXT: ret 63define i32 @srem(i32 %a, i32 %b) { 64 %op = srem i32 %a, %b, !dbg !7 65 ret i32 %op 66} 67 68; Make sure there's no crash if the IRBuilder decided to constant fold something 69; CHECK-LABEL: @add_constant_fold( 70; RESULT-NEXT: %op = add i32 0, 0, !dbg !7 71; RESULT-NEXT: ret 72define i32 @add_constant_fold() { 73 %op = add i32 0, 0, !dbg !7 74 ret i32 %op 75} 76 77; CHECK-LABEL: @add( 78; RESULT-NEXT: %op = or i32 %a, %b, !dbg !7 79; RESULT-NEXT: ret 80define i32 @add(i32 %a, i32 %b) { 81 %op = add i32 %a, %b, !dbg !7 82 ret i32 %op 83} 84 85; CHECK-LABEL: @add_nuw( 86; RESULT-NEXT: %op = or i32 %a, %b, !dbg !7 87; RESULT-NEXT: ret 88define i32 @add_nuw(i32 %a, i32 %b) { 89 %op = add nuw i32 %a, %b, !dbg !7 90 ret i32 %op 91} 92 93; CHECK-LABEL: @add_nsw( 94; RESULT-NEXT: %op = or i32 %a, %b, !dbg !7 95; RESULT-NEXT: ret 96define i32 @add_nsw(i32 %a, i32 %b) { 97 %op = add nsw i32 %a, %b, !dbg !7 98 ret i32 %op 99} 100 101; CHECK-LABEL: @sub_nuw_nsw( 102; RESULT-NEXT: %op = or i32 %a, %b, !dbg !7 103; RESULT-NEXT: ret 104define i32 @sub_nuw_nsw(i32 %a, i32 %b) { 105 %op = sub nuw nsw i32 %a, %b, !dbg !7 106 ret i32 %op 107} 108 109; CHECK-LABEL: @workitem_id_y( 110; RESULT-NEXT: %id = call i32 @llvm.amdgcn.workitem.id.x(), !dbg !7 111; RESULT-NEXT: ret 112define i32 @workitem_id_y() { 113 %id = call i32 @llvm.amdgcn.workitem.id.y(), !dbg !7 114 ret i32 %id 115} 116 117; CHECK-LABEL: @workitem_id_z( 118; RESULT-NEXT: %id = call i32 @llvm.amdgcn.workitem.id.x(), !dbg !7 119; RESULT-NEXT: ret 120define i32 @workitem_id_z() { 121 %id = call i32 @llvm.amdgcn.workitem.id.z(), !dbg !7 122 ret i32 %id 123} 124 125; CHECK-LABEL: @workgroup_id_y( 126; RESULT-NEXT: %id = call i32 @llvm.amdgcn.workgroup.id.x(), !dbg !7 127; RESULT-NEXT: ret 128define i32 @workgroup_id_y() { 129 %id = call i32 @llvm.amdgcn.workgroup.id.y(), !dbg !7 130 ret i32 %id 131} 132 133; CHECK-LABEL: @workgroup_id_z( 134; RESULT-NEXT: %id = call i32 @llvm.amdgcn.workgroup.id.x(), !dbg !7 135; RESULT-NEXT: ret 136define i32 @workgroup_id_z() { 137 %id = call i32 @llvm.amdgcn.workgroup.id.z(), !dbg !7 138 ret i32 %id 139} 140 141; CHECK-LABEL: @minnum_nsz( 142; RESULT-NEXT: %op = fmul nsz float %a, %b, !dbg !7 143; RESULT-NEXT: ret 144define float @minnum_nsz(float %a, float %b) { 145 %op = call nsz float @llvm.minnum.f32(float %a, float %b), !dbg !7 146 ret float %op 147} 148 149; CHECK-LABEL: @maxnum_nsz( 150; RESULT-NEXT: %op = fmul nsz float %a, %b, !dbg !7 151; RESULT-NEXT: ret 152define float @maxnum_nsz(float %a, float %b) { 153 %op = call nsz float @llvm.maxnum.f32(float %a, float %b), !dbg !7 154 ret float %op 155} 156 157; CHECK-LABEL: @minimum_nsz( 158; RESULT-NEXT: %op = fmul nsz float %a, %b, !dbg !7 159; RESULT-NEXT: ret 160define float @minimum_nsz(float %a, float %b) { 161 %op = call nsz float @llvm.minimum.f32(float %a, float %b), !dbg !7 162 ret float %op 163} 164 165; CHECK-LABEL: @maximum_nsz( 166; RESULT-NEXT: %op = fmul nsz float %a, %b, !dbg !7 167; RESULT-NEXT: ret 168define float @maximum_nsz(float %a, float %b) { 169 %op = call nsz float @llvm.maximum.f32(float %a, float %b), !dbg !7 170 ret float %op 171} 172 173; CHECK-LABEL: @sqrt_ninf( 174; RESULT-NEXT: %op = fmul ninf float %a, 2.000000e+00, !dbg !7 175; RESULT-NEXT: ret 176define float @sqrt_ninf(float %a, float %b) { 177 %op = call ninf float @llvm.sqrt.f32(float %a), !dbg !7 178 ret float %op 179} 180 181; CHECK-LABEL: @sqrt_vec( 182; RESULT-NEXT: %op = fmul <2 x float> %a, splat (float 2.000000e+00), !dbg !7 183; RESULT-NEXT: ret 184define <2 x float> @sqrt_vec(<2 x float> %a, <2 x float> %b) { 185 %op = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %a), !dbg !7 186 ret <2 x float> %op 187} 188 189; CHECK-LABEL: @div_fixup( 190; RESULT-NEXT: %op = call float @llvm.fma.f32(float %a, float %b, float %c) 191; RESULT-NEXT: ret 192define float @div_fixup(float %a, float %b, float %c) { 193 %op = call float @llvm.amdgcn.div.fixup.f32(float %a, float %b, float %c) 194 ret float %op 195} 196 197; CHECK-LABEL: @fma_legacy( 198; RESULT-NEXT: %op = call float @llvm.fma.f32(float %a, float %b, float %c) 199; RESULT-NEXT: ret 200define float @fma_legacy(float %a, float %b, float %c) { 201 %op = call float @llvm.amdgcn.fma.legacy(float %a, float %b, float %c) 202 ret float %op 203} 204 205; CHECK-LABEL: @fmul_legacy( 206; RESULT-NEXT: %op = fmul float %a, %b 207; RESULT-NEXT: ret 208define float @fmul_legacy(float %a, float %b) { 209 %op = call float @llvm.amdgcn.fmul.legacy(float %a, float %b) 210 ret float %op 211} 212 213declare i32 @llvm.amdgcn.workitem.id.y() 214declare i32 @llvm.amdgcn.workitem.id.z() 215declare i32 @llvm.amdgcn.workgroup.id.y() 216declare i32 @llvm.amdgcn.workgroup.id.z() 217declare float @llvm.amdgcn.div.fixup.f32(float, float, float) 218declare float @llvm.amdgcn.fma.legacy(float, float, float) 219declare float @llvm.amdgcn.fmul.legacy(float, float) 220 221declare float @llvm.sqrt.f32(float) 222declare <2 x float> @llvm.sqrt.v2f32(<2 x float>) 223declare float @llvm.maxnum.f32(float, float) 224declare float @llvm.minnum.f32(float, float) 225declare float @llvm.maximum.f32(float, float) 226declare float @llvm.minimum.f32(float, float) 227 228!llvm.dbg.cu = !{!0} 229!opencl.ocl.version = !{!3, !3} 230!llvm.module.flags = !{!4, !5} 231!llvm.ident = !{!6} 232 233!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2) 234!1 = !DIFile(filename: "arst.c", directory: "/some/random/directory") 235!2 = !{} 236!3 = !{i32 2, i32 0} 237!4 = !{i32 2, !"Dwarf Version", i32 2} 238!5 = !{i32 2, !"Debug Info Version", i32 3} 239!6 = !{!""} 240!7 = !DILocation(line: 2, column: 6, scope: !8) 241!8 = distinct !DISubprogram(name: "arst", scope: !1, file: !1, line: 1, type: !9, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2) 242!9 = !DISubroutineType(types: !10) 243!10 = !{null, !11} 244!11 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !12, size: 64) 245!12 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) 246!13 = !{float 2.500000e+00} 247