1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views=false -instruction-info < %s | FileCheck %s --check-prefix=NORMAL 3# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views=false -instruction-info -show-encoding=false < %s | FileCheck %s --check-prefix=NORMAL 4# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views=false -instruction-info -show-encoding < %s | FileCheck %s --check-prefix=WITHENCODINGS 5 6 movq 0x170(%rbp), %r10 7 lea (%r8,%r8,2), %r9d 8 movsx %r9d, %r9 9 inc %r8d 10 movq 0x178(%rbp), %r11 11 vmovups (%r10,%r9,4), %xmm3 12 vpslldq $0x4, %xmm3, %xmm2 13 vpslldq $0x4, %xmm3, %xmm4 14 vaddps %xmm2, %xmm3, %xmm6 15 vpslldq $0xc, %xmm3, %xmm5 16 vaddps %xmm4, %xmm5, %xmm7 17 vaddps %xmm6, %xmm7, %xmm8 18 vaddps %xmm8, %xmm0, %xmm9 19 vshufps $0xff, %xmm9, %xmm9, %xmm0 20 vmovups %xmm9, (%r11,%r9,4) 21 cmp %r8d, %esi 22 jl -90 23 24# NORMAL: Instruction Info: 25# NORMAL-NEXT: [1]: #uOps 26# NORMAL-NEXT: [2]: Latency 27# NORMAL-NEXT: [3]: RThroughput 28# NORMAL-NEXT: [4]: MayLoad 29# NORMAL-NEXT: [5]: MayStore 30# NORMAL-NEXT: [6]: HasSideEffects (U) 31 32# WITHENCODINGS: Instruction Info: 33# WITHENCODINGS-NEXT: [1]: #uOps 34# WITHENCODINGS-NEXT: [2]: Latency 35# WITHENCODINGS-NEXT: [3]: RThroughput 36# WITHENCODINGS-NEXT: [4]: MayLoad 37# WITHENCODINGS-NEXT: [5]: MayStore 38# WITHENCODINGS-NEXT: [6]: HasSideEffects (U) 39# WITHENCODINGS-NEXT: [7]: Encoding Size 40 41# NORMAL: [1] [2] [3] [4] [5] [6] Instructions: 42# NORMAL-NEXT: 1 3 1.00 * movq 368(%rbp), %r10 43# NORMAL-NEXT: 1 2 1.00 leal (%r8,%r8,2), %r9d 44# NORMAL-NEXT: 1 1 0.50 movslq %r9d, %r9 45# NORMAL-NEXT: 1 1 0.50 incl %r8d 46# NORMAL-NEXT: 1 3 1.00 * movq 376(%rbp), %r11 47# NORMAL-NEXT: 1 5 1.00 * vmovups (%r10,%r9,4), %xmm3 48# NORMAL-NEXT: 1 1 0.50 vpslldq $4, %xmm3, %xmm2 49# NORMAL-NEXT: 1 1 0.50 vpslldq $4, %xmm3, %xmm4 50# NORMAL-NEXT: 1 3 1.00 vaddps %xmm2, %xmm3, %xmm6 51# NORMAL-NEXT: 1 1 0.50 vpslldq $12, %xmm3, %xmm5 52# NORMAL-NEXT: 1 3 1.00 vaddps %xmm4, %xmm5, %xmm7 53# NORMAL-NEXT: 1 3 1.00 vaddps %xmm6, %xmm7, %xmm8 54# NORMAL-NEXT: 1 3 1.00 vaddps %xmm0, %xmm8, %xmm9 55# NORMAL-NEXT: 1 1 0.50 vshufps $255, %xmm9, %xmm9, %xmm0 56# NORMAL-NEXT: 1 1 1.00 * vmovups %xmm9, (%r11,%r9,4) 57# NORMAL-NEXT: 1 1 0.50 cmpl %r8d, %esi 58# NORMAL-NEXT: 1 1 0.50 jl -90 59 60# WITHENCODINGS: [1] [2] [3] [4] [5] [6] [7] Encodings: Instructions: 61# WITHENCODINGS-NEXT: 1 3 1.00 * 7 4c 8b 95 70 01 00 00 movq 368(%rbp), %r10 62# WITHENCODINGS-NEXT: 1 2 1.00 4 47 8d 0c 40 leal (%r8,%r8,2), %r9d 63# WITHENCODINGS-NEXT: 1 1 0.50 3 4d 63 c9 movslq %r9d, %r9 64# WITHENCODINGS-NEXT: 1 1 0.50 3 41 ff c0 incl %r8d 65# WITHENCODINGS-NEXT: 1 3 1.00 * 7 4c 8b 9d 78 01 00 00 movq 376(%rbp), %r11 66# WITHENCODINGS-NEXT: 1 5 1.00 * 6 c4 81 78 10 1c 8a vmovups (%r10,%r9,4), %xmm3 67# WITHENCODINGS-NEXT: 1 1 0.50 5 c5 e9 73 fb 04 vpslldq $4, %xmm3, %xmm2 68# WITHENCODINGS-NEXT: 1 1 0.50 5 c5 d9 73 fb 04 vpslldq $4, %xmm3, %xmm4 69# WITHENCODINGS-NEXT: 1 3 1.00 4 c5 e0 58 f2 vaddps %xmm2, %xmm3, %xmm6 70# WITHENCODINGS-NEXT: 1 1 0.50 5 c5 d1 73 fb 0c vpslldq $12, %xmm3, %xmm5 71# WITHENCODINGS-NEXT: 1 3 1.00 4 c5 d0 58 fc vaddps %xmm4, %xmm5, %xmm7 72# WITHENCODINGS-NEXT: 1 3 1.00 4 c5 40 58 c6 vaddps %xmm6, %xmm7, %xmm8 73# WITHENCODINGS-NEXT: 1 3 1.00 4 c5 38 58 c8 vaddps %xmm0, %xmm8, %xmm9 74# WITHENCODINGS-NEXT: 1 1 0.50 6 c4 c1 30 c6 c1 ff vshufps $255, %xmm9, %xmm9, %xmm0 75# WITHENCODINGS-NEXT: 1 1 1.00 * 6 c4 01 78 11 0c 8b vmovups %xmm9, (%r11,%r9,4) 76# WITHENCODINGS-NEXT: 1 1 0.50 3 44 39 c6 cmpl %r8d, %esi 77# WITHENCODINGS-NEXT: 1 1 0.50 6 0f 8c 00 00 00 00 jl -90 78