xref: /llvm-project/llvm/test/tools/llvm-mca/X86/BdVer2/pr37790.s (revision 85e6e748d426f8992016914b07bc67c4da22e278)
1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -lqueue=2 -iterations=2 -resource-pressure=false -timeline -timeline-max-cycles=104 < %s | FileCheck %s
3
4int3
5stmxcsr (%rsp)
6
7# CHECK:      Iterations:        2
8# CHECK-NEXT: Instructions:      4
9# CHECK-NEXT: Total Cycles:      103
10# CHECK-NEXT: Total uOps:        6
11
12# CHECK:      Dispatch Width:    4
13# CHECK-NEXT: uOps Per Cycle:    0.06
14# CHECK-NEXT: IPC:               0.04
15# CHECK-NEXT: Block RThroughput: 18.0
16
17# CHECK:      Instruction Info:
18# CHECK-NEXT: [1]: #uOps
19# CHECK-NEXT: [2]: Latency
20# CHECK-NEXT: [3]: RThroughput
21# CHECK-NEXT: [4]: MayLoad
22# CHECK-NEXT: [5]: MayStore
23# CHECK-NEXT: [6]: HasSideEffects (U)
24
25# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
26# CHECK-NEXT:  1      100   0.50    *      *      U     int3
27# CHECK-NEXT:  2      1     18.00          *      U     stmxcsr	(%rsp)
28
29# CHECK:      Timeline view:
30# CHECK-NEXT:                     0123456789          0123456789          0123456789          0123456789          0123456789
31# CHECK-NEXT: Index     0123456789          0123456789          0123456789          0123456789          0123456789          012
32
33# CHECK:      [0,0]     DeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeER   int3
34# CHECK-NEXT: [0,1]     DeE---------------------------------------------------------------------------------------------------R   stmxcsr	(%rsp)
35# CHECK-NEXT: [1,0]     DeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeER   int3
36# CHECK-NEXT: [1,1]     .D=================eE---------------------------------------------------------------------------------R   stmxcsr	(%rsp)
37
38# CHECK:      Average Wait times (based on the timeline view):
39# CHECK-NEXT: [0]: Executions
40# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
41# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
42# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
43
44# CHECK:            [0]    [1]    [2]    [3]
45# CHECK-NEXT: 0.     2     1.0    0.5    0.0       int3
46# CHECK-NEXT: 1.     2     9.5    9.0    90.0      stmxcsr	(%rsp)
47# CHECK-NEXT:        2     5.3    4.8    45.0      <total>
48