1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# Verify that we create proper JSON for the MCA views TimelineView, ResourcePressureview, 3# InstructionInfoView and SummaryView. 4 5# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json --timeline-max-iterations=1 --timeline --all-stats --all-views < %s | FileCheck %s 6# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json --timeline-max-iterations=1 --timeline --all-stats --all-views -o %t.json < %s 7# RUN: cat %t.json \ 8# RUN: | %python -c 'import json, sys; json.dump(json.loads(sys.stdin.read()), sys.stdout, sort_keys=True, indent=2)' \ 9# RUN: | FileCheck %s 10 11# LLVM-MCA-BEGIN foo 12add %eax, %eax 13# LLVM-MCA-BEGIN bar 14add %ebx, %ebx 15add %ecx, %ecx 16# LLVM-MCA-END bar 17add %edx, %edx 18# LLVM-MCA-END foo 19 20# CHECK: { 21# CHECK-NEXT: "CodeRegions": [ 22# CHECK-NEXT: { 23# CHECK-NEXT: "BottleneckAnalysis": { 24# CHECK-NEXT: "PressureIncreaseCycles": 0 25# CHECK-NEXT: }, 26# CHECK-NEXT: "DispatchStatistics": { 27# CHECK-NEXT: "GROUP": 0, 28# CHECK-NEXT: "LQ": 0, 29# CHECK-NEXT: "RAT": 0, 30# CHECK-NEXT: "RCU": 0, 31# CHECK-NEXT: "SCHEDQ": 0, 32# CHECK-NEXT: "SQ": 0, 33# CHECK-NEXT: "USH": 0 34# CHECK-NEXT: }, 35# CHECK-NEXT: "InstructionInfoView": { 36# CHECK-NEXT: "InstructionList": [ 37# CHECK-NEXT: { 38# CHECK-NEXT: "Instruction": 0, 39# CHECK-NEXT: "Latency": 1, 40# CHECK-NEXT: "NumMicroOpcodes": 1, 41# CHECK-NEXT: "RThroughput": 0.25, 42# CHECK-NEXT: "hasUnmodeledSideEffects": false, 43# CHECK-NEXT: "mayLoad": false, 44# CHECK-NEXT: "mayStore": false 45# CHECK-NEXT: }, 46# CHECK-NEXT: { 47# CHECK-NEXT: "Instruction": 1, 48# CHECK-NEXT: "Latency": 1, 49# CHECK-NEXT: "NumMicroOpcodes": 1, 50# CHECK-NEXT: "RThroughput": 0.25, 51# CHECK-NEXT: "hasUnmodeledSideEffects": false, 52# CHECK-NEXT: "mayLoad": false, 53# CHECK-NEXT: "mayStore": false 54# CHECK-NEXT: }, 55# CHECK-NEXT: { 56# CHECK-NEXT: "Instruction": 2, 57# CHECK-NEXT: "Latency": 1, 58# CHECK-NEXT: "NumMicroOpcodes": 1, 59# CHECK-NEXT: "RThroughput": 0.25, 60# CHECK-NEXT: "hasUnmodeledSideEffects": false, 61# CHECK-NEXT: "mayLoad": false, 62# CHECK-NEXT: "mayStore": false 63# CHECK-NEXT: }, 64# CHECK-NEXT: { 65# CHECK-NEXT: "Instruction": 3, 66# CHECK-NEXT: "Latency": 1, 67# CHECK-NEXT: "NumMicroOpcodes": 1, 68# CHECK-NEXT: "RThroughput": 0.25, 69# CHECK-NEXT: "hasUnmodeledSideEffects": false, 70# CHECK-NEXT: "mayLoad": false, 71# CHECK-NEXT: "mayStore": false 72# CHECK-NEXT: } 73# CHECK-NEXT: ] 74# CHECK-NEXT: }, 75# CHECK-NEXT: "Instructions": [ 76# CHECK-NEXT: "addl\t%eax, %eax", 77# CHECK-NEXT: "addl\t%ebx, %ebx", 78# CHECK-NEXT: "addl\t%ecx, %ecx", 79# CHECK-NEXT: "addl\t%edx, %edx" 80# CHECK-NEXT: ], 81# CHECK-NEXT: "Name": "foo", 82# CHECK-NEXT: "ResourcePressureView": { 83# CHECK-NEXT: "ResourcePressureInfo": [ 84# CHECK-NEXT: { 85# CHECK-NEXT: "InstructionIndex": 0, 86# CHECK-NEXT: "ResourceIndex": 8, 87# CHECK-NEXT: "ResourceUsage": 1 88# CHECK-NEXT: }, 89# CHECK-NEXT: { 90# CHECK-NEXT: "InstructionIndex": 1, 91# CHECK-NEXT: "ResourceIndex": 7, 92# CHECK-NEXT: "ResourceUsage": 1 93# CHECK-NEXT: }, 94# CHECK-NEXT: { 95# CHECK-NEXT: "InstructionIndex": 2, 96# CHECK-NEXT: "ResourceIndex": 3, 97# CHECK-NEXT: "ResourceUsage": 1 98# CHECK-NEXT: }, 99# CHECK-NEXT: { 100# CHECK-NEXT: "InstructionIndex": 3, 101# CHECK-NEXT: "ResourceIndex": 2, 102# CHECK-NEXT: "ResourceUsage": 1 103# CHECK-NEXT: }, 104# CHECK-NEXT: { 105# CHECK-NEXT: "InstructionIndex": 4, 106# CHECK-NEXT: "ResourceIndex": 2, 107# CHECK-NEXT: "ResourceUsage": 1 108# CHECK-NEXT: }, 109# CHECK-NEXT: { 110# CHECK-NEXT: "InstructionIndex": 4, 111# CHECK-NEXT: "ResourceIndex": 3, 112# CHECK-NEXT: "ResourceUsage": 1 113# CHECK-NEXT: }, 114# CHECK-NEXT: { 115# CHECK-NEXT: "InstructionIndex": 4, 116# CHECK-NEXT: "ResourceIndex": 7, 117# CHECK-NEXT: "ResourceUsage": 1 118# CHECK-NEXT: }, 119# CHECK-NEXT: { 120# CHECK-NEXT: "InstructionIndex": 4, 121# CHECK-NEXT: "ResourceIndex": 8, 122# CHECK-NEXT: "ResourceUsage": 1 123# CHECK-NEXT: } 124# CHECK-NEXT: ] 125# CHECK-NEXT: }, 126# CHECK-NEXT: "SummaryView": { 127# CHECK-NEXT: "BlockRThroughput": 1, 128# CHECK-NEXT: "DispatchWidth": 4, 129# CHECK-NEXT: "IPC": 3.883495145631068, 130# CHECK-NEXT: "Instructions": 400, 131# CHECK-NEXT: "Iterations": 100, 132# CHECK-NEXT: "TotalCycles": 103, 133# CHECK-NEXT: "TotaluOps": 400, 134# CHECK-NEXT: "uOpsPerCycle": 3.883495145631068 135# CHECK-NEXT: }, 136# CHECK-NEXT: "TimelineView": { 137# CHECK-NEXT: "TimelineInfo": [ 138# CHECK-NEXT: { 139# CHECK-NEXT: "CycleDispatched": 0, 140# CHECK-NEXT: "CycleExecuted": 2, 141# CHECK-NEXT: "CycleIssued": 1, 142# CHECK-NEXT: "CycleReady": 0, 143# CHECK-NEXT: "CycleRetired": 3 144# CHECK-NEXT: }, 145# CHECK-NEXT: { 146# CHECK-NEXT: "CycleDispatched": 0, 147# CHECK-NEXT: "CycleExecuted": 2, 148# CHECK-NEXT: "CycleIssued": 1, 149# CHECK-NEXT: "CycleReady": 0, 150# CHECK-NEXT: "CycleRetired": 3 151# CHECK-NEXT: }, 152# CHECK-NEXT: { 153# CHECK-NEXT: "CycleDispatched": 0, 154# CHECK-NEXT: "CycleExecuted": 2, 155# CHECK-NEXT: "CycleIssued": 1, 156# CHECK-NEXT: "CycleReady": 0, 157# CHECK-NEXT: "CycleRetired": 3 158# CHECK-NEXT: }, 159# CHECK-NEXT: { 160# CHECK-NEXT: "CycleDispatched": 0, 161# CHECK-NEXT: "CycleExecuted": 2, 162# CHECK-NEXT: "CycleIssued": 1, 163# CHECK-NEXT: "CycleReady": 0, 164# CHECK-NEXT: "CycleRetired": 3 165# CHECK-NEXT: } 166# CHECK-NEXT: ] 167# CHECK-NEXT: } 168# CHECK-NEXT: }, 169# CHECK-NEXT: { 170# CHECK-NEXT: "BottleneckAnalysis": { 171# CHECK-NEXT: "DataDependencyCycles": 69, 172# CHECK-NEXT: "DependencyEdge": [ 173# CHECK-NEXT: { 174# CHECK-NEXT: "FromID": 0, 175# CHECK-NEXT: "ResourceOrRegID": 24, 176# CHECK-NEXT: "ToID": 2, 177# CHECK-NEXT: "Type": 1 178# CHECK-NEXT: }, 179# CHECK-NEXT: { 180# CHECK-NEXT: "FromID": 2, 181# CHECK-NEXT: "ResourceOrRegID": 24, 182# CHECK-NEXT: "ToID": 4, 183# CHECK-NEXT: "Type": 1 184# CHECK-NEXT: } 185# CHECK-NEXT: ], 186# CHECK-NEXT: "MemoryDependencyCycles": 0, 187# CHECK-NEXT: "PressureIncreaseCycles": 69, 188# CHECK-NEXT: "RegisterDependencyCycles": 69, 189# CHECK-NEXT: "ResourcePressure": [], 190# CHECK-NEXT: "ResourcePressureCycles": 0, 191# CHECK-NEXT: "TotalCycles": 103 192# CHECK-NEXT: }, 193# CHECK-NEXT: "DispatchStatistics": { 194# CHECK-NEXT: "GROUP": 0, 195# CHECK-NEXT: "LQ": 0, 196# CHECK-NEXT: "RAT": 0, 197# CHECK-NEXT: "RCU": 0, 198# CHECK-NEXT: "SCHEDQ": 41, 199# CHECK-NEXT: "SQ": 0, 200# CHECK-NEXT: "USH": 0 201# CHECK-NEXT: }, 202# CHECK-NEXT: "InstructionInfoView": { 203# CHECK-NEXT: "InstructionList": [ 204# CHECK-NEXT: { 205# CHECK-NEXT: "Instruction": 0, 206# CHECK-NEXT: "Latency": 1, 207# CHECK-NEXT: "NumMicroOpcodes": 1, 208# CHECK-NEXT: "RThroughput": 0.25, 209# CHECK-NEXT: "hasUnmodeledSideEffects": false, 210# CHECK-NEXT: "mayLoad": false, 211# CHECK-NEXT: "mayStore": false 212# CHECK-NEXT: }, 213# CHECK-NEXT: { 214# CHECK-NEXT: "Instruction": 1, 215# CHECK-NEXT: "Latency": 1, 216# CHECK-NEXT: "NumMicroOpcodes": 1, 217# CHECK-NEXT: "RThroughput": 0.25, 218# CHECK-NEXT: "hasUnmodeledSideEffects": false, 219# CHECK-NEXT: "mayLoad": false, 220# CHECK-NEXT: "mayStore": false 221# CHECK-NEXT: } 222# CHECK-NEXT: ] 223# CHECK-NEXT: }, 224# CHECK-NEXT: "Instructions": [ 225# CHECK-NEXT: "addl\t%ebx, %ebx", 226# CHECK-NEXT: "addl\t%ecx, %ecx" 227# CHECK-NEXT: ], 228# CHECK-NEXT: "Name": "bar", 229# CHECK-NEXT: "ResourcePressureView": { 230# CHECK-NEXT: "ResourcePressureInfo": [ 231# CHECK-NEXT: { 232# CHECK-NEXT: "InstructionIndex": 0, 233# CHECK-NEXT: "ResourceIndex": 3, 234# CHECK-NEXT: "ResourceUsage": 0.5 235# CHECK-NEXT: }, 236# CHECK-NEXT: { 237# CHECK-NEXT: "InstructionIndex": 0, 238# CHECK-NEXT: "ResourceIndex": 8, 239# CHECK-NEXT: "ResourceUsage": 0.5 240# CHECK-NEXT: }, 241# CHECK-NEXT: { 242# CHECK-NEXT: "InstructionIndex": 1, 243# CHECK-NEXT: "ResourceIndex": 2, 244# CHECK-NEXT: "ResourceUsage": 0.5 245# CHECK-NEXT: }, 246# CHECK-NEXT: { 247# CHECK-NEXT: "InstructionIndex": 1, 248# CHECK-NEXT: "ResourceIndex": 7, 249# CHECK-NEXT: "ResourceUsage": 0.5 250# CHECK-NEXT: }, 251# CHECK-NEXT: { 252# CHECK-NEXT: "InstructionIndex": 2, 253# CHECK-NEXT: "ResourceIndex": 2, 254# CHECK-NEXT: "ResourceUsage": 0.5 255# CHECK-NEXT: }, 256# CHECK-NEXT: { 257# CHECK-NEXT: "InstructionIndex": 2, 258# CHECK-NEXT: "ResourceIndex": 3, 259# CHECK-NEXT: "ResourceUsage": 0.5 260# CHECK-NEXT: }, 261# CHECK-NEXT: { 262# CHECK-NEXT: "InstructionIndex": 2, 263# CHECK-NEXT: "ResourceIndex": 7, 264# CHECK-NEXT: "ResourceUsage": 0.5 265# CHECK-NEXT: }, 266# CHECK-NEXT: { 267# CHECK-NEXT: "InstructionIndex": 2, 268# CHECK-NEXT: "ResourceIndex": 8, 269# CHECK-NEXT: "ResourceUsage": 0.5 270# CHECK-NEXT: } 271# CHECK-NEXT: ] 272# CHECK-NEXT: }, 273# CHECK-NEXT: "SummaryView": { 274# CHECK-NEXT: "BlockRThroughput": 0.5, 275# CHECK-NEXT: "DispatchWidth": 4, 276# CHECK-NEXT: "IPC": 1.941747572815534, 277# CHECK-NEXT: "Instructions": 200, 278# CHECK-NEXT: "Iterations": 100, 279# CHECK-NEXT: "TotalCycles": 103, 280# CHECK-NEXT: "TotaluOps": 200, 281# CHECK-NEXT: "uOpsPerCycle": 1.941747572815534 282# CHECK-NEXT: }, 283# CHECK-NEXT: "TimelineView": { 284# CHECK-NEXT: "TimelineInfo": [ 285# CHECK-NEXT: { 286# CHECK-NEXT: "CycleDispatched": 0, 287# CHECK-NEXT: "CycleExecuted": 2, 288# CHECK-NEXT: "CycleIssued": 1, 289# CHECK-NEXT: "CycleReady": 0, 290# CHECK-NEXT: "CycleRetired": 3 291# CHECK-NEXT: }, 292# CHECK-NEXT: { 293# CHECK-NEXT: "CycleDispatched": 0, 294# CHECK-NEXT: "CycleExecuted": 2, 295# CHECK-NEXT: "CycleIssued": 1, 296# CHECK-NEXT: "CycleReady": 0, 297# CHECK-NEXT: "CycleRetired": 3 298# CHECK-NEXT: } 299# CHECK-NEXT: ] 300# CHECK-NEXT: } 301# CHECK-NEXT: } 302# CHECK-NEXT: ], 303# CHECK-NEXT: "SimulationParameters": { 304# CHECK-NEXT: "-march": "x86_64", 305# CHECK-NEXT: "-mcpu": "haswell", 306# CHECK-NEXT: "-mtriple": "x86_64-unknown-unknown" 307# CHECK-NEXT: }, 308# CHECK-NEXT: "TargetInfo": { 309# CHECK-NEXT: "CPUName": "haswell", 310# CHECK-NEXT: "Resources": [ 311# CHECK-NEXT: "HWDivider", 312# CHECK-NEXT: "HWFPDivider", 313# CHECK-NEXT: "HWPort0", 314# CHECK-NEXT: "HWPort1", 315# CHECK-NEXT: "HWPort2", 316# CHECK-NEXT: "HWPort3", 317# CHECK-NEXT: "HWPort4", 318# CHECK-NEXT: "HWPort5", 319# CHECK-NEXT: "HWPort6", 320# CHECK-NEXT: "HWPort7" 321# CHECK-NEXT: ] 322# CHECK-NEXT: } 323# CHECK-NEXT: } 324