1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json -all-views < %s | FileCheck %s 3# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell --json -all-views -o %t.json < %s 4# RUN: cat %t.json \ 5# RUN: | %python -c 'import json, sys; json.dump(json.loads(sys.stdin.read()), sys.stdout, sort_keys=True, indent=2)' \ 6# RUN: | FileCheck %s 7 8# LLVM-MCA-BEGIN 9add %eax, %eax 10# LLVM-MCA-END 11# LLVM-MCA-BEGIN 12add %ebx, %ebx 13add %ecx, %ecx 14# LLVM-MCA-END 15# LLVM-MCA-BEGIN 16add %edx, %edx 17# LLVM-MCA-END 18 19# CHECK: { 20# CHECK-NEXT: "CodeRegions": [ 21# CHECK-NEXT: { 22# CHECK-NEXT: "BottleneckAnalysis": { 23# CHECK-NEXT: "DataDependencyCycles": 39, 24# CHECK-NEXT: "DependencyEdge": [ 25# CHECK-NEXT: { 26# CHECK-NEXT: "FromID": 0, 27# CHECK-NEXT: "ResourceOrRegID": 22, 28# CHECK-NEXT: "ToID": 1, 29# CHECK-NEXT: "Type": 1 30# CHECK-NEXT: }, 31# CHECK-NEXT: { 32# CHECK-NEXT: "FromID": 1, 33# CHECK-NEXT: "ResourceOrRegID": 22, 34# CHECK-NEXT: "ToID": 2, 35# CHECK-NEXT: "Type": 1 36# CHECK-NEXT: } 37# CHECK-NEXT: ], 38# CHECK-NEXT: "MemoryDependencyCycles": 0, 39# CHECK-NEXT: "PressureIncreaseCycles": 39, 40# CHECK-NEXT: "RegisterDependencyCycles": 39, 41# CHECK-NEXT: "ResourcePressure": [], 42# CHECK-NEXT: "ResourcePressureCycles": 0, 43# CHECK-NEXT: "TotalCycles": 103 44# CHECK-NEXT: }, 45# CHECK-NEXT: "DispatchStatistics": { 46# CHECK-NEXT: "GROUP": 0, 47# CHECK-NEXT: "LQ": 0, 48# CHECK-NEXT: "RAT": 0, 49# CHECK-NEXT: "RCU": 0, 50# CHECK-NEXT: "SCHEDQ": 21, 51# CHECK-NEXT: "SQ": 0, 52# CHECK-NEXT: "USH": 0 53# CHECK-NEXT: }, 54# CHECK-NEXT: "InstructionInfoView": { 55# CHECK-NEXT: "InstructionList": [ 56# CHECK-NEXT: { 57# CHECK-NEXT: "Instruction": 0, 58# CHECK-NEXT: "Latency": 1, 59# CHECK-NEXT: "NumMicroOpcodes": 1, 60# CHECK-NEXT: "RThroughput": 0.25, 61# CHECK-NEXT: "hasUnmodeledSideEffects": false, 62# CHECK-NEXT: "mayLoad": false, 63# CHECK-NEXT: "mayStore": false 64# CHECK-NEXT: } 65# CHECK-NEXT: ] 66# CHECK-NEXT: }, 67# CHECK-NEXT: "Instructions": [ 68# CHECK-NEXT: "addl\t%eax, %eax" 69# CHECK-NEXT: ], 70# CHECK-NEXT: "Name": "", 71# CHECK-NEXT: "ResourcePressureView": { 72# CHECK-NEXT: "ResourcePressureInfo": [ 73# CHECK-NEXT: { 74# CHECK-NEXT: "InstructionIndex": 0, 75# CHECK-NEXT: "ResourceIndex": 2, 76# CHECK-NEXT: "ResourceUsage": 0.25 77# CHECK-NEXT: }, 78# CHECK-NEXT: { 79# CHECK-NEXT: "InstructionIndex": 0, 80# CHECK-NEXT: "ResourceIndex": 3, 81# CHECK-NEXT: "ResourceUsage": 0.25 82# CHECK-NEXT: }, 83# CHECK-NEXT: { 84# CHECK-NEXT: "InstructionIndex": 0, 85# CHECK-NEXT: "ResourceIndex": 7, 86# CHECK-NEXT: "ResourceUsage": 0.25 87# CHECK-NEXT: }, 88# CHECK-NEXT: { 89# CHECK-NEXT: "InstructionIndex": 0, 90# CHECK-NEXT: "ResourceIndex": 8, 91# CHECK-NEXT: "ResourceUsage": 0.25 92# CHECK-NEXT: }, 93# CHECK-NEXT: { 94# CHECK-NEXT: "InstructionIndex": 1, 95# CHECK-NEXT: "ResourceIndex": 2, 96# CHECK-NEXT: "ResourceUsage": 0.25 97# CHECK-NEXT: }, 98# CHECK-NEXT: { 99# CHECK-NEXT: "InstructionIndex": 1, 100# CHECK-NEXT: "ResourceIndex": 3, 101# CHECK-NEXT: "ResourceUsage": 0.25 102# CHECK-NEXT: }, 103# CHECK-NEXT: { 104# CHECK-NEXT: "InstructionIndex": 1, 105# CHECK-NEXT: "ResourceIndex": 7, 106# CHECK-NEXT: "ResourceUsage": 0.25 107# CHECK-NEXT: }, 108# CHECK-NEXT: { 109# CHECK-NEXT: "InstructionIndex": 1, 110# CHECK-NEXT: "ResourceIndex": 8, 111# CHECK-NEXT: "ResourceUsage": 0.25 112# CHECK-NEXT: } 113# CHECK-NEXT: ] 114# CHECK-NEXT: }, 115# CHECK-NEXT: "SummaryView": { 116# CHECK-NEXT: "BlockRThroughput": 0.25, 117# CHECK-NEXT: "DispatchWidth": 4, 118# CHECK-NEXT: "IPC": 0.970873786407767, 119# CHECK-NEXT: "Instructions": 100, 120# CHECK-NEXT: "Iterations": 100, 121# CHECK-NEXT: "TotalCycles": 103, 122# CHECK-NEXT: "TotaluOps": 100, 123# CHECK-NEXT: "uOpsPerCycle": 0.970873786407767 124# CHECK-NEXT: }, 125# CHECK-NEXT: "TimelineView": { 126# CHECK-NEXT: "TimelineInfo": [ 127# CHECK-NEXT: { 128# CHECK-NEXT: "CycleDispatched": 0, 129# CHECK-NEXT: "CycleExecuted": 2, 130# CHECK-NEXT: "CycleIssued": 1, 131# CHECK-NEXT: "CycleReady": 0, 132# CHECK-NEXT: "CycleRetired": 3 133# CHECK-NEXT: }, 134# CHECK-NEXT: { 135# CHECK-NEXT: "CycleDispatched": 0, 136# CHECK-NEXT: "CycleExecuted": 3, 137# CHECK-NEXT: "CycleIssued": 2, 138# CHECK-NEXT: "CycleReady": 2, 139# CHECK-NEXT: "CycleRetired": 4 140# CHECK-NEXT: }, 141# CHECK-NEXT: { 142# CHECK-NEXT: "CycleDispatched": 0, 143# CHECK-NEXT: "CycleExecuted": 4, 144# CHECK-NEXT: "CycleIssued": 3, 145# CHECK-NEXT: "CycleReady": 3, 146# CHECK-NEXT: "CycleRetired": 5 147# CHECK-NEXT: }, 148# CHECK-NEXT: { 149# CHECK-NEXT: "CycleDispatched": 0, 150# CHECK-NEXT: "CycleExecuted": 5, 151# CHECK-NEXT: "CycleIssued": 4, 152# CHECK-NEXT: "CycleReady": 4, 153# CHECK-NEXT: "CycleRetired": 6 154# CHECK-NEXT: }, 155# CHECK-NEXT: { 156# CHECK-NEXT: "CycleDispatched": 1, 157# CHECK-NEXT: "CycleExecuted": 6, 158# CHECK-NEXT: "CycleIssued": 5, 159# CHECK-NEXT: "CycleReady": 5, 160# CHECK-NEXT: "CycleRetired": 7 161# CHECK-NEXT: }, 162# CHECK-NEXT: { 163# CHECK-NEXT: "CycleDispatched": 1, 164# CHECK-NEXT: "CycleExecuted": 7, 165# CHECK-NEXT: "CycleIssued": 6, 166# CHECK-NEXT: "CycleReady": 6, 167# CHECK-NEXT: "CycleRetired": 8 168# CHECK-NEXT: }, 169# CHECK-NEXT: { 170# CHECK-NEXT: "CycleDispatched": 1, 171# CHECK-NEXT: "CycleExecuted": 8, 172# CHECK-NEXT: "CycleIssued": 7, 173# CHECK-NEXT: "CycleReady": 7, 174# CHECK-NEXT: "CycleRetired": 9 175# CHECK-NEXT: }, 176# CHECK-NEXT: { 177# CHECK-NEXT: "CycleDispatched": 1, 178# CHECK-NEXT: "CycleExecuted": 9, 179# CHECK-NEXT: "CycleIssued": 8, 180# CHECK-NEXT: "CycleReady": 8, 181# CHECK-NEXT: "CycleRetired": 10 182# CHECK-NEXT: }, 183# CHECK-NEXT: { 184# CHECK-NEXT: "CycleDispatched": 2, 185# CHECK-NEXT: "CycleExecuted": 10, 186# CHECK-NEXT: "CycleIssued": 9, 187# CHECK-NEXT: "CycleReady": 9, 188# CHECK-NEXT: "CycleRetired": 11 189# CHECK-NEXT: }, 190# CHECK-NEXT: { 191# CHECK-NEXT: "CycleDispatched": 2, 192# CHECK-NEXT: "CycleExecuted": 11, 193# CHECK-NEXT: "CycleIssued": 10, 194# CHECK-NEXT: "CycleReady": 10, 195# CHECK-NEXT: "CycleRetired": 12 196# CHECK-NEXT: } 197# CHECK-NEXT: ] 198# CHECK-NEXT: } 199# CHECK-NEXT: }, 200# CHECK-NEXT: { 201# CHECK-NEXT: "BottleneckAnalysis": { 202# CHECK-NEXT: "DataDependencyCycles": 69, 203# CHECK-NEXT: "DependencyEdge": [ 204# CHECK-NEXT: { 205# CHECK-NEXT: "FromID": 0, 206# CHECK-NEXT: "ResourceOrRegID": 24, 207# CHECK-NEXT: "ToID": 2, 208# CHECK-NEXT: "Type": 1 209# CHECK-NEXT: }, 210# CHECK-NEXT: { 211# CHECK-NEXT: "FromID": 2, 212# CHECK-NEXT: "ResourceOrRegID": 24, 213# CHECK-NEXT: "ToID": 4, 214# CHECK-NEXT: "Type": 1 215# CHECK-NEXT: } 216# CHECK-NEXT: ], 217# CHECK-NEXT: "MemoryDependencyCycles": 0, 218# CHECK-NEXT: "PressureIncreaseCycles": 69, 219# CHECK-NEXT: "RegisterDependencyCycles": 69, 220# CHECK-NEXT: "ResourcePressure": [], 221# CHECK-NEXT: "ResourcePressureCycles": 0, 222# CHECK-NEXT: "TotalCycles": 103 223# CHECK-NEXT: }, 224# CHECK-NEXT: "DispatchStatistics": { 225# CHECK-NEXT: "GROUP": 0, 226# CHECK-NEXT: "LQ": 0, 227# CHECK-NEXT: "RAT": 0, 228# CHECK-NEXT: "RCU": 0, 229# CHECK-NEXT: "SCHEDQ": 41, 230# CHECK-NEXT: "SQ": 0, 231# CHECK-NEXT: "USH": 0 232# CHECK-NEXT: }, 233# CHECK-NEXT: "InstructionInfoView": { 234# CHECK-NEXT: "InstructionList": [ 235# CHECK-NEXT: { 236# CHECK-NEXT: "Instruction": 0, 237# CHECK-NEXT: "Latency": 1, 238# CHECK-NEXT: "NumMicroOpcodes": 1, 239# CHECK-NEXT: "RThroughput": 0.25, 240# CHECK-NEXT: "hasUnmodeledSideEffects": false, 241# CHECK-NEXT: "mayLoad": false, 242# CHECK-NEXT: "mayStore": false 243# CHECK-NEXT: }, 244# CHECK-NEXT: { 245# CHECK-NEXT: "Instruction": 1, 246# CHECK-NEXT: "Latency": 1, 247# CHECK-NEXT: "NumMicroOpcodes": 1, 248# CHECK-NEXT: "RThroughput": 0.25, 249# CHECK-NEXT: "hasUnmodeledSideEffects": false, 250# CHECK-NEXT: "mayLoad": false, 251# CHECK-NEXT: "mayStore": false 252# CHECK-NEXT: } 253# CHECK-NEXT: ] 254# CHECK-NEXT: }, 255# CHECK-NEXT: "Instructions": [ 256# CHECK-NEXT: "addl\t%ebx, %ebx", 257# CHECK-NEXT: "addl\t%ecx, %ecx" 258# CHECK-NEXT: ], 259# CHECK-NEXT: "Name": "", 260# CHECK-NEXT: "ResourcePressureView": { 261# CHECK-NEXT: "ResourcePressureInfo": [ 262# CHECK-NEXT: { 263# CHECK-NEXT: "InstructionIndex": 0, 264# CHECK-NEXT: "ResourceIndex": 3, 265# CHECK-NEXT: "ResourceUsage": 0.5 266# CHECK-NEXT: }, 267# CHECK-NEXT: { 268# CHECK-NEXT: "InstructionIndex": 0, 269# CHECK-NEXT: "ResourceIndex": 8, 270# CHECK-NEXT: "ResourceUsage": 0.5 271# CHECK-NEXT: }, 272# CHECK-NEXT: { 273# CHECK-NEXT: "InstructionIndex": 1, 274# CHECK-NEXT: "ResourceIndex": 2, 275# CHECK-NEXT: "ResourceUsage": 0.5 276# CHECK-NEXT: }, 277# CHECK-NEXT: { 278# CHECK-NEXT: "InstructionIndex": 1, 279# CHECK-NEXT: "ResourceIndex": 7, 280# CHECK-NEXT: "ResourceUsage": 0.5 281# CHECK-NEXT: }, 282# CHECK-NEXT: { 283# CHECK-NEXT: "InstructionIndex": 2, 284# CHECK-NEXT: "ResourceIndex": 2, 285# CHECK-NEXT: "ResourceUsage": 0.5 286# CHECK-NEXT: }, 287# CHECK-NEXT: { 288# CHECK-NEXT: "InstructionIndex": 2, 289# CHECK-NEXT: "ResourceIndex": 3, 290# CHECK-NEXT: "ResourceUsage": 0.5 291# CHECK-NEXT: }, 292# CHECK-NEXT: { 293# CHECK-NEXT: "InstructionIndex": 2, 294# CHECK-NEXT: "ResourceIndex": 7, 295# CHECK-NEXT: "ResourceUsage": 0.5 296# CHECK-NEXT: }, 297# CHECK-NEXT: { 298# CHECK-NEXT: "InstructionIndex": 2, 299# CHECK-NEXT: "ResourceIndex": 8, 300# CHECK-NEXT: "ResourceUsage": 0.5 301# CHECK-NEXT: } 302# CHECK-NEXT: ] 303# CHECK-NEXT: }, 304# CHECK-NEXT: "SummaryView": { 305# CHECK-NEXT: "BlockRThroughput": 0.5, 306# CHECK-NEXT: "DispatchWidth": 4, 307# CHECK-NEXT: "IPC": 1.941747572815534, 308# CHECK-NEXT: "Instructions": 200, 309# CHECK-NEXT: "Iterations": 100, 310# CHECK-NEXT: "TotalCycles": 103, 311# CHECK-NEXT: "TotaluOps": 200, 312# CHECK-NEXT: "uOpsPerCycle": 1.941747572815534 313# CHECK-NEXT: }, 314# CHECK-NEXT: "TimelineView": { 315# CHECK-NEXT: "TimelineInfo": [ 316# CHECK-NEXT: { 317# CHECK-NEXT: "CycleDispatched": 0, 318# CHECK-NEXT: "CycleExecuted": 2, 319# CHECK-NEXT: "CycleIssued": 1, 320# CHECK-NEXT: "CycleReady": 0, 321# CHECK-NEXT: "CycleRetired": 3 322# CHECK-NEXT: }, 323# CHECK-NEXT: { 324# CHECK-NEXT: "CycleDispatched": 0, 325# CHECK-NEXT: "CycleExecuted": 2, 326# CHECK-NEXT: "CycleIssued": 1, 327# CHECK-NEXT: "CycleReady": 0, 328# CHECK-NEXT: "CycleRetired": 3 329# CHECK-NEXT: }, 330# CHECK-NEXT: { 331# CHECK-NEXT: "CycleDispatched": 0, 332# CHECK-NEXT: "CycleExecuted": 3, 333# CHECK-NEXT: "CycleIssued": 2, 334# CHECK-NEXT: "CycleReady": 2, 335# CHECK-NEXT: "CycleRetired": 4 336# CHECK-NEXT: }, 337# CHECK-NEXT: { 338# CHECK-NEXT: "CycleDispatched": 0, 339# CHECK-NEXT: "CycleExecuted": 3, 340# CHECK-NEXT: "CycleIssued": 2, 341# CHECK-NEXT: "CycleReady": 2, 342# CHECK-NEXT: "CycleRetired": 4 343# CHECK-NEXT: }, 344# CHECK-NEXT: { 345# CHECK-NEXT: "CycleDispatched": 1, 346# CHECK-NEXT: "CycleExecuted": 4, 347# CHECK-NEXT: "CycleIssued": 3, 348# CHECK-NEXT: "CycleReady": 3, 349# CHECK-NEXT: "CycleRetired": 5 350# CHECK-NEXT: }, 351# CHECK-NEXT: { 352# CHECK-NEXT: "CycleDispatched": 1, 353# CHECK-NEXT: "CycleExecuted": 4, 354# CHECK-NEXT: "CycleIssued": 3, 355# CHECK-NEXT: "CycleReady": 3, 356# CHECK-NEXT: "CycleRetired": 5 357# CHECK-NEXT: }, 358# CHECK-NEXT: { 359# CHECK-NEXT: "CycleDispatched": 1, 360# CHECK-NEXT: "CycleExecuted": 5, 361# CHECK-NEXT: "CycleIssued": 4, 362# CHECK-NEXT: "CycleReady": 4, 363# CHECK-NEXT: "CycleRetired": 6 364# CHECK-NEXT: }, 365# CHECK-NEXT: { 366# CHECK-NEXT: "CycleDispatched": 1, 367# CHECK-NEXT: "CycleExecuted": 5, 368# CHECK-NEXT: "CycleIssued": 4, 369# CHECK-NEXT: "CycleReady": 4, 370# CHECK-NEXT: "CycleRetired": 6 371# CHECK-NEXT: }, 372# CHECK-NEXT: { 373# CHECK-NEXT: "CycleDispatched": 2, 374# CHECK-NEXT: "CycleExecuted": 6, 375# CHECK-NEXT: "CycleIssued": 5, 376# CHECK-NEXT: "CycleReady": 5, 377# CHECK-NEXT: "CycleRetired": 7 378# CHECK-NEXT: }, 379# CHECK-NEXT: { 380# CHECK-NEXT: "CycleDispatched": 2, 381# CHECK-NEXT: "CycleExecuted": 6, 382# CHECK-NEXT: "CycleIssued": 5, 383# CHECK-NEXT: "CycleReady": 5, 384# CHECK-NEXT: "CycleRetired": 7 385# CHECK-NEXT: }, 386# CHECK-NEXT: { 387# CHECK-NEXT: "CycleDispatched": 2, 388# CHECK-NEXT: "CycleExecuted": 7, 389# CHECK-NEXT: "CycleIssued": 6, 390# CHECK-NEXT: "CycleReady": 6, 391# CHECK-NEXT: "CycleRetired": 8 392# CHECK-NEXT: }, 393# CHECK-NEXT: { 394# CHECK-NEXT: "CycleDispatched": 2, 395# CHECK-NEXT: "CycleExecuted": 7, 396# CHECK-NEXT: "CycleIssued": 6, 397# CHECK-NEXT: "CycleReady": 6, 398# CHECK-NEXT: "CycleRetired": 8 399# CHECK-NEXT: }, 400# CHECK-NEXT: { 401# CHECK-NEXT: "CycleDispatched": 3, 402# CHECK-NEXT: "CycleExecuted": 8, 403# CHECK-NEXT: "CycleIssued": 7, 404# CHECK-NEXT: "CycleReady": 7, 405# CHECK-NEXT: "CycleRetired": 9 406# CHECK-NEXT: }, 407# CHECK-NEXT: { 408# CHECK-NEXT: "CycleDispatched": 3, 409# CHECK-NEXT: "CycleExecuted": 8, 410# CHECK-NEXT: "CycleIssued": 7, 411# CHECK-NEXT: "CycleReady": 7, 412# CHECK-NEXT: "CycleRetired": 9 413# CHECK-NEXT: }, 414# CHECK-NEXT: { 415# CHECK-NEXT: "CycleDispatched": 3, 416# CHECK-NEXT: "CycleExecuted": 9, 417# CHECK-NEXT: "CycleIssued": 8, 418# CHECK-NEXT: "CycleReady": 8, 419# CHECK-NEXT: "CycleRetired": 10 420# CHECK-NEXT: }, 421# CHECK-NEXT: { 422# CHECK-NEXT: "CycleDispatched": 3, 423# CHECK-NEXT: "CycleExecuted": 9, 424# CHECK-NEXT: "CycleIssued": 8, 425# CHECK-NEXT: "CycleReady": 8, 426# CHECK-NEXT: "CycleRetired": 10 427# CHECK-NEXT: }, 428# CHECK-NEXT: { 429# CHECK-NEXT: "CycleDispatched": 4, 430# CHECK-NEXT: "CycleExecuted": 10, 431# CHECK-NEXT: "CycleIssued": 9, 432# CHECK-NEXT: "CycleReady": 9, 433# CHECK-NEXT: "CycleRetired": 11 434# CHECK-NEXT: }, 435# CHECK-NEXT: { 436# CHECK-NEXT: "CycleDispatched": 4, 437# CHECK-NEXT: "CycleExecuted": 10, 438# CHECK-NEXT: "CycleIssued": 9, 439# CHECK-NEXT: "CycleReady": 9, 440# CHECK-NEXT: "CycleRetired": 11 441# CHECK-NEXT: }, 442# CHECK-NEXT: { 443# CHECK-NEXT: "CycleDispatched": 4, 444# CHECK-NEXT: "CycleExecuted": 11, 445# CHECK-NEXT: "CycleIssued": 10, 446# CHECK-NEXT: "CycleReady": 10, 447# CHECK-NEXT: "CycleRetired": 12 448# CHECK-NEXT: }, 449# CHECK-NEXT: { 450# CHECK-NEXT: "CycleDispatched": 4, 451# CHECK-NEXT: "CycleExecuted": 11, 452# CHECK-NEXT: "CycleIssued": 10, 453# CHECK-NEXT: "CycleReady": 10, 454# CHECK-NEXT: "CycleRetired": 12 455# CHECK-NEXT: } 456# CHECK-NEXT: ] 457# CHECK-NEXT: } 458# CHECK-NEXT: }, 459# CHECK-NEXT: { 460# CHECK-NEXT: "BottleneckAnalysis": { 461# CHECK-NEXT: "DataDependencyCycles": 39, 462# CHECK-NEXT: "DependencyEdge": [ 463# CHECK-NEXT: { 464# CHECK-NEXT: "FromID": 0, 465# CHECK-NEXT: "ResourceOrRegID": 27, 466# CHECK-NEXT: "ToID": 1, 467# CHECK-NEXT: "Type": 1 468# CHECK-NEXT: }, 469# CHECK-NEXT: { 470# CHECK-NEXT: "FromID": 1, 471# CHECK-NEXT: "ResourceOrRegID": 27, 472# CHECK-NEXT: "ToID": 2, 473# CHECK-NEXT: "Type": 1 474# CHECK-NEXT: } 475# CHECK-NEXT: ], 476# CHECK-NEXT: "MemoryDependencyCycles": 0, 477# CHECK-NEXT: "PressureIncreaseCycles": 39, 478# CHECK-NEXT: "RegisterDependencyCycles": 39, 479# CHECK-NEXT: "ResourcePressure": [], 480# CHECK-NEXT: "ResourcePressureCycles": 0, 481# CHECK-NEXT: "TotalCycles": 103 482# CHECK-NEXT: }, 483# CHECK-NEXT: "DispatchStatistics": { 484# CHECK-NEXT: "GROUP": 0, 485# CHECK-NEXT: "LQ": 0, 486# CHECK-NEXT: "RAT": 0, 487# CHECK-NEXT: "RCU": 0, 488# CHECK-NEXT: "SCHEDQ": 21, 489# CHECK-NEXT: "SQ": 0, 490# CHECK-NEXT: "USH": 0 491# CHECK-NEXT: }, 492# CHECK-NEXT: "InstructionInfoView": { 493# CHECK-NEXT: "InstructionList": [ 494# CHECK-NEXT: { 495# CHECK-NEXT: "Instruction": 0, 496# CHECK-NEXT: "Latency": 1, 497# CHECK-NEXT: "NumMicroOpcodes": 1, 498# CHECK-NEXT: "RThroughput": 0.25, 499# CHECK-NEXT: "hasUnmodeledSideEffects": false, 500# CHECK-NEXT: "mayLoad": false, 501# CHECK-NEXT: "mayStore": false 502# CHECK-NEXT: } 503# CHECK-NEXT: ] 504# CHECK-NEXT: }, 505# CHECK-NEXT: "Instructions": [ 506# CHECK-NEXT: "addl\t%edx, %edx" 507# CHECK-NEXT: ], 508# CHECK-NEXT: "Name": "", 509# CHECK-NEXT: "ResourcePressureView": { 510# CHECK-NEXT: "ResourcePressureInfo": [ 511# CHECK-NEXT: { 512# CHECK-NEXT: "InstructionIndex": 0, 513# CHECK-NEXT: "ResourceIndex": 2, 514# CHECK-NEXT: "ResourceUsage": 0.25 515# CHECK-NEXT: }, 516# CHECK-NEXT: { 517# CHECK-NEXT: "InstructionIndex": 0, 518# CHECK-NEXT: "ResourceIndex": 3, 519# CHECK-NEXT: "ResourceUsage": 0.25 520# CHECK-NEXT: }, 521# CHECK-NEXT: { 522# CHECK-NEXT: "InstructionIndex": 0, 523# CHECK-NEXT: "ResourceIndex": 7, 524# CHECK-NEXT: "ResourceUsage": 0.25 525# CHECK-NEXT: }, 526# CHECK-NEXT: { 527# CHECK-NEXT: "InstructionIndex": 0, 528# CHECK-NEXT: "ResourceIndex": 8, 529# CHECK-NEXT: "ResourceUsage": 0.25 530# CHECK-NEXT: }, 531# CHECK-NEXT: { 532# CHECK-NEXT: "InstructionIndex": 1, 533# CHECK-NEXT: "ResourceIndex": 2, 534# CHECK-NEXT: "ResourceUsage": 0.25 535# CHECK-NEXT: }, 536# CHECK-NEXT: { 537# CHECK-NEXT: "InstructionIndex": 1, 538# CHECK-NEXT: "ResourceIndex": 3, 539# CHECK-NEXT: "ResourceUsage": 0.25 540# CHECK-NEXT: }, 541# CHECK-NEXT: { 542# CHECK-NEXT: "InstructionIndex": 1, 543# CHECK-NEXT: "ResourceIndex": 7, 544# CHECK-NEXT: "ResourceUsage": 0.25 545# CHECK-NEXT: }, 546# CHECK-NEXT: { 547# CHECK-NEXT: "InstructionIndex": 1, 548# CHECK-NEXT: "ResourceIndex": 8, 549# CHECK-NEXT: "ResourceUsage": 0.25 550# CHECK-NEXT: } 551# CHECK-NEXT: ] 552# CHECK-NEXT: }, 553# CHECK-NEXT: "SummaryView": { 554# CHECK-NEXT: "BlockRThroughput": 0.25, 555# CHECK-NEXT: "DispatchWidth": 4, 556# CHECK-NEXT: "IPC": 0.970873786407767, 557# CHECK-NEXT: "Instructions": 100, 558# CHECK-NEXT: "Iterations": 100, 559# CHECK-NEXT: "TotalCycles": 103, 560# CHECK-NEXT: "TotaluOps": 100, 561# CHECK-NEXT: "uOpsPerCycle": 0.970873786407767 562# CHECK-NEXT: }, 563# CHECK-NEXT: "TimelineView": { 564# CHECK-NEXT: "TimelineInfo": [ 565# CHECK-NEXT: { 566# CHECK-NEXT: "CycleDispatched": 0, 567# CHECK-NEXT: "CycleExecuted": 2, 568# CHECK-NEXT: "CycleIssued": 1, 569# CHECK-NEXT: "CycleReady": 0, 570# CHECK-NEXT: "CycleRetired": 3 571# CHECK-NEXT: }, 572# CHECK-NEXT: { 573# CHECK-NEXT: "CycleDispatched": 0, 574# CHECK-NEXT: "CycleExecuted": 3, 575# CHECK-NEXT: "CycleIssued": 2, 576# CHECK-NEXT: "CycleReady": 2, 577# CHECK-NEXT: "CycleRetired": 4 578# CHECK-NEXT: }, 579# CHECK-NEXT: { 580# CHECK-NEXT: "CycleDispatched": 0, 581# CHECK-NEXT: "CycleExecuted": 4, 582# CHECK-NEXT: "CycleIssued": 3, 583# CHECK-NEXT: "CycleReady": 3, 584# CHECK-NEXT: "CycleRetired": 5 585# CHECK-NEXT: }, 586# CHECK-NEXT: { 587# CHECK-NEXT: "CycleDispatched": 0, 588# CHECK-NEXT: "CycleExecuted": 5, 589# CHECK-NEXT: "CycleIssued": 4, 590# CHECK-NEXT: "CycleReady": 4, 591# CHECK-NEXT: "CycleRetired": 6 592# CHECK-NEXT: }, 593# CHECK-NEXT: { 594# CHECK-NEXT: "CycleDispatched": 1, 595# CHECK-NEXT: "CycleExecuted": 6, 596# CHECK-NEXT: "CycleIssued": 5, 597# CHECK-NEXT: "CycleReady": 5, 598# CHECK-NEXT: "CycleRetired": 7 599# CHECK-NEXT: }, 600# CHECK-NEXT: { 601# CHECK-NEXT: "CycleDispatched": 1, 602# CHECK-NEXT: "CycleExecuted": 7, 603# CHECK-NEXT: "CycleIssued": 6, 604# CHECK-NEXT: "CycleReady": 6, 605# CHECK-NEXT: "CycleRetired": 8 606# CHECK-NEXT: }, 607# CHECK-NEXT: { 608# CHECK-NEXT: "CycleDispatched": 1, 609# CHECK-NEXT: "CycleExecuted": 8, 610# CHECK-NEXT: "CycleIssued": 7, 611# CHECK-NEXT: "CycleReady": 7, 612# CHECK-NEXT: "CycleRetired": 9 613# CHECK-NEXT: }, 614# CHECK-NEXT: { 615# CHECK-NEXT: "CycleDispatched": 1, 616# CHECK-NEXT: "CycleExecuted": 9, 617# CHECK-NEXT: "CycleIssued": 8, 618# CHECK-NEXT: "CycleReady": 8, 619# CHECK-NEXT: "CycleRetired": 10 620# CHECK-NEXT: }, 621# CHECK-NEXT: { 622# CHECK-NEXT: "CycleDispatched": 2, 623# CHECK-NEXT: "CycleExecuted": 10, 624# CHECK-NEXT: "CycleIssued": 9, 625# CHECK-NEXT: "CycleReady": 9, 626# CHECK-NEXT: "CycleRetired": 11 627# CHECK-NEXT: }, 628# CHECK-NEXT: { 629# CHECK-NEXT: "CycleDispatched": 2, 630# CHECK-NEXT: "CycleExecuted": 11, 631# CHECK-NEXT: "CycleIssued": 10, 632# CHECK-NEXT: "CycleReady": 10, 633# CHECK-NEXT: "CycleRetired": 12 634# CHECK-NEXT: } 635# CHECK-NEXT: ] 636# CHECK-NEXT: } 637# CHECK-NEXT: } 638# CHECK-NEXT: ], 639# CHECK-NEXT: "SimulationParameters": { 640# CHECK-NEXT: "-march": "x86_64", 641# CHECK-NEXT: "-mcpu": "haswell", 642# CHECK-NEXT: "-mtriple": "x86_64-unknown-unknown" 643# CHECK-NEXT: }, 644# CHECK-NEXT: "TargetInfo": { 645# CHECK-NEXT: "CPUName": "haswell", 646# CHECK-NEXT: "Resources": [ 647# CHECK-NEXT: "HWDivider", 648# CHECK-NEXT: "HWFPDivider", 649# CHECK-NEXT: "HWPort0", 650# CHECK-NEXT: "HWPort1", 651# CHECK-NEXT: "HWPort2", 652# CHECK-NEXT: "HWPort3", 653# CHECK-NEXT: "HWPort4", 654# CHECK-NEXT: "HWPort5", 655# CHECK-NEXT: "HWPort6", 656# CHECK-NEXT: "HWPort7" 657# CHECK-NEXT: ] 658# CHECK-NEXT: } 659# CHECK-NEXT: } 660