xref: /llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/A55-add-sequence.s (revision 292da93d59a3688ffc95c10de7986472242e8f1d)
1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2# RUN: llvm-mca -mtriple=aarch64 -mcpu=cortex-a55 --timeline --iterations=2 < %s | FileCheck %s
3
4add      w2, w3, #1
5add      w4, w3, #2, lsl #12
6add      w0, w4, #3
7add      w1, w0, #4
8
9# CHECK:      Iterations:        2
10# CHECK-NEXT: Instructions:      8
11# CHECK-NEXT: Total Cycles:      9
12# CHECK-NEXT: Total uOps:        8
13
14# CHECK:      Dispatch Width:    2
15# CHECK-NEXT: uOps Per Cycle:    0.89
16# CHECK-NEXT: IPC:               0.89
17# CHECK-NEXT: Block RThroughput: 2.0
18
19# CHECK:      Instruction Info:
20# CHECK-NEXT: [1]: #uOps
21# CHECK-NEXT: [2]: Latency
22# CHECK-NEXT: [3]: RThroughput
23# CHECK-NEXT: [4]: MayLoad
24# CHECK-NEXT: [5]: MayStore
25# CHECK-NEXT: [6]: HasSideEffects (U)
26
27# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
28# CHECK-NEXT:  1      3     0.50                        add	w2, w3, #1
29# CHECK-NEXT:  1      3     0.50                        add	w4, w3, #2, lsl #12
30# CHECK-NEXT:  1      3     0.50                        add	w0, w4, #3
31# CHECK-NEXT:  1      3     0.50                        add	w1, w0, #4
32
33# CHECK:      Resources:
34# CHECK-NEXT: [0.0] - CortexA55UnitALU
35# CHECK-NEXT: [0.1] - CortexA55UnitALU
36# CHECK-NEXT: [1]   - CortexA55UnitB
37# CHECK-NEXT: [2]   - CortexA55UnitDiv
38# CHECK-NEXT: [3.0] - CortexA55UnitFPALU
39# CHECK-NEXT: [3.1] - CortexA55UnitFPALU
40# CHECK-NEXT: [4]   - CortexA55UnitFPDIV
41# CHECK-NEXT: [5.0] - CortexA55UnitFPMAC
42# CHECK-NEXT: [5.1] - CortexA55UnitFPMAC
43# CHECK-NEXT: [6]   - CortexA55UnitLd
44# CHECK-NEXT: [7]   - CortexA55UnitMAC
45# CHECK-NEXT: [8]   - CortexA55UnitSt
46
47# CHECK:      Resource pressure per iteration:
48# CHECK-NEXT: [0.0]  [0.1]  [1]    [2]    [3.0]  [3.1]  [4]    [5.0]  [5.1]  [6]    [7]    [8]
49# CHECK-NEXT: 2.00   2.00    -      -      -      -      -      -      -      -      -      -
50
51# CHECK:      Resource pressure by instruction:
52# CHECK-NEXT: [0.0]  [0.1]  [1]    [2]    [3.0]  [3.1]  [4]    [5.0]  [5.1]  [6]    [7]    [8]    Instructions:
53# CHECK-NEXT:  -     1.00    -      -      -      -      -      -      -      -      -      -     add	w2, w3, #1
54# CHECK-NEXT: 1.00    -      -      -      -      -      -      -      -      -      -      -     add	w4, w3, #2, lsl #12
55# CHECK-NEXT:  -     1.00    -      -      -      -      -      -      -      -      -      -     add	w0, w4, #3
56# CHECK-NEXT: 1.00    -      -      -      -      -      -      -      -      -      -      -     add	w1, w0, #4
57
58# CHECK:      Timeline view:
59# CHECK-NEXT: Index     012345678
60
61# CHECK:      [0,0]     DeeE .  .   add	w2, w3, #1
62# CHECK-NEXT: [0,1]     DeeE .  .   add	w4, w3, #2, lsl #12
63# CHECK-NEXT: [0,2]     .DeeE.  .   add	w0, w4, #3
64# CHECK-NEXT: [0,3]     . DeeE  .   add	w1, w0, #4
65# CHECK-NEXT: [1,0]     . DeeE  .   add	w2, w3, #1
66# CHECK-NEXT: [1,1]     .  DeeE .   add	w4, w3, #2, lsl #12
67# CHECK-NEXT: [1,2]     .   DeeE.   add	w0, w4, #3
68# CHECK-NEXT: [1,3]     .    DeeE   add	w1, w0, #4
69
70# CHECK:      Average Wait times (based on the timeline view):
71# CHECK-NEXT: [0]: Executions
72# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
73# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
74# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
75
76# CHECK:            [0]    [1]    [2]    [3]
77# CHECK-NEXT: 0.     2     0.0    0.0    0.0       add	w2, w3, #1
78# CHECK-NEXT: 1.     2     0.0    0.0    0.0       add	w4, w3, #2, lsl #12
79# CHECK-NEXT: 2.     2     0.0    0.0    0.0       add	w0, w4, #3
80# CHECK-NEXT: 3.     2     0.0    0.0    0.0       add	w1, w0, #4
81# CHECK-NEXT:        2     0.0    0.0    0.0       <total>
82