1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -switch-range-to-icmp < %s | FileCheck %s 3; RUN: opt -S -data-layout="p:32:32-p1:16:16" -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -switch-range-to-icmp < %s | FileCheck -check-prefix=CHECK -check-prefix=DL %s 4 5declare void @foo1() 6 7declare void @foo2() 8 9define void @test1(i32 %V) { 10; CHECK-LABEL: @test1( 11; CHECK-NEXT: switch i32 [[V:%.*]], label [[F:%.*]] [ 12; CHECK-NEXT: i32 17, label [[T:%.*]] 13; CHECK-NEXT: i32 4, label [[T]] 14; CHECK-NEXT: ] 15; CHECK: common.ret: 16; CHECK-NEXT: ret void 17; CHECK: T: 18; CHECK-NEXT: call void @foo1() 19; CHECK-NEXT: br label [[COMMON_RET:%.*]] 20; CHECK: F: 21; CHECK-NEXT: call void @foo2() 22; CHECK-NEXT: br label [[COMMON_RET]] 23; 24 %C1 = icmp eq i32 %V, 4 ; <i1> [#uses=1] 25 %C2 = icmp eq i32 %V, 17 ; <i1> [#uses=1] 26 %CN = or i1 %C1, %C2 ; <i1> [#uses=1] 27 br i1 %CN, label %T, label %F 28T: ; preds = %0 29 call void @foo1( ) 30 ret void 31F: ; preds = %0 32 call void @foo2( ) 33 ret void 34} 35 36define void @test1_select(i32 %V) { 37; CHECK-LABEL: @test1_select( 38; CHECK-NEXT: switch i32 [[V:%.*]], label [[F:%.*]] [ 39; CHECK-NEXT: i32 17, label [[T:%.*]] 40; CHECK-NEXT: i32 4, label [[T]] 41; CHECK-NEXT: ] 42; CHECK: common.ret: 43; CHECK-NEXT: ret void 44; CHECK: T: 45; CHECK-NEXT: call void @foo1() 46; CHECK-NEXT: br label [[COMMON_RET:%.*]] 47; CHECK: F: 48; CHECK-NEXT: call void @foo2() 49; CHECK-NEXT: br label [[COMMON_RET]] 50; 51 %C1 = icmp eq i32 %V, 4 52 %C2 = icmp eq i32 %V, 17 53 %CN = select i1 %C1, i1 true, i1 %C2 54 br i1 %CN, label %T, label %F 55T: 56 call void @foo1( ) 57 ret void 58F: 59 call void @foo2( ) 60 ret void 61} 62 63define void @test1_ptr(ptr %V) { 64; DL-LABEL: @test1_ptr( 65; DL-NEXT: [[MAGICPTR:%.*]] = ptrtoint ptr [[V:%.*]] to i32 66; DL-NEXT: switch i32 [[MAGICPTR]], label [[F:%.*]] [ 67; DL-NEXT: i32 17, label [[T:%.*]] 68; DL-NEXT: i32 4, label [[T]] 69; DL-NEXT: ] 70; DL: common.ret: 71; DL-NEXT: ret void 72; DL: T: 73; DL-NEXT: call void @foo1() 74; DL-NEXT: br label [[COMMON_RET:%.*]] 75; DL: F: 76; DL-NEXT: call void @foo2() 77; DL-NEXT: br label [[COMMON_RET]] 78; 79 %C1 = icmp eq ptr %V, inttoptr (i32 4 to ptr) 80 %C2 = icmp eq ptr %V, inttoptr (i32 17 to ptr) 81 %CN = or i1 %C1, %C2 ; <i1> [#uses=1] 82 br i1 %CN, label %T, label %F 83T: ; preds = %0 84 call void @foo1( ) 85 ret void 86F: ; preds = %0 87 call void @foo2( ) 88 ret void 89} 90 91define void @test1_ptr_as1(ptr addrspace(1) %V) { 92; DL-LABEL: @test1_ptr_as1( 93; DL-NEXT: [[MAGICPTR:%.*]] = ptrtoint ptr addrspace(1) [[V:%.*]] to i16 94; DL-NEXT: switch i16 [[MAGICPTR]], label [[F:%.*]] [ 95; DL-NEXT: i16 17, label [[T:%.*]] 96; DL-NEXT: i16 4, label [[T]] 97; DL-NEXT: ] 98; DL: common.ret: 99; DL-NEXT: ret void 100; DL: T: 101; DL-NEXT: call void @foo1() 102; DL-NEXT: br label [[COMMON_RET:%.*]] 103; DL: F: 104; DL-NEXT: call void @foo2() 105; DL-NEXT: br label [[COMMON_RET]] 106; 107 %C1 = icmp eq ptr addrspace(1) %V, inttoptr (i32 4 to ptr addrspace(1)) 108 %C2 = icmp eq ptr addrspace(1) %V, inttoptr (i32 17 to ptr addrspace(1)) 109 %CN = or i1 %C1, %C2 ; <i1> [#uses=1] 110 br i1 %CN, label %T, label %F 111T: ; preds = %0 112 call void @foo1( ) 113 ret void 114F: ; preds = %0 115 call void @foo2( ) 116 ret void 117} 118 119define void @test2(i32 %V) { 120; CHECK-LABEL: @test2( 121; CHECK-NEXT: switch i32 [[V:%.*]], label [[T:%.*]] [ 122; CHECK-NEXT: i32 17, label [[F:%.*]] 123; CHECK-NEXT: i32 4, label [[F]] 124; CHECK-NEXT: ] 125; CHECK: common.ret: 126; CHECK-NEXT: ret void 127; CHECK: T: 128; CHECK-NEXT: call void @foo1() 129; CHECK-NEXT: br label [[COMMON_RET:%.*]] 130; CHECK: F: 131; CHECK-NEXT: call void @foo2() 132; CHECK-NEXT: br label [[COMMON_RET]] 133; 134 %C1 = icmp ne i32 %V, 4 ; <i1> [#uses=1] 135 %C2 = icmp ne i32 %V, 17 ; <i1> [#uses=1] 136 %CN = and i1 %C1, %C2 ; <i1> [#uses=1] 137 br i1 %CN, label %T, label %F 138T: ; preds = %0 139 call void @foo1( ) 140 ret void 141F: ; preds = %0 142 call void @foo2( ) 143 ret void 144} 145 146define void @test2_select(i32 %V) { 147; CHECK-LABEL: @test2_select( 148; CHECK-NEXT: switch i32 [[V:%.*]], label [[T:%.*]] [ 149; CHECK-NEXT: i32 17, label [[F:%.*]] 150; CHECK-NEXT: i32 4, label [[F]] 151; CHECK-NEXT: ] 152; CHECK: common.ret: 153; CHECK-NEXT: ret void 154; CHECK: T: 155; CHECK-NEXT: call void @foo1() 156; CHECK-NEXT: br label [[COMMON_RET:%.*]] 157; CHECK: F: 158; CHECK-NEXT: call void @foo2() 159; CHECK-NEXT: br label [[COMMON_RET]] 160; 161 %C1 = icmp ne i32 %V, 4 162 %C2 = icmp ne i32 %V, 17 163 %CN = select i1 %C1, i1 %C2, i1 false 164 br i1 %CN, label %T, label %F 165T: 166 call void @foo1( ) 167 ret void 168F: 169 call void @foo2( ) 170 ret void 171} 172 173define void @test3(i32 %V) { 174; CHECK-LABEL: @test3( 175; CHECK-NEXT: switch i32 [[V:%.*]], label [[F:%.*]] [ 176; CHECK-NEXT: i32 4, label [[T:%.*]] 177; CHECK-NEXT: i32 17, label [[T]] 178; CHECK-NEXT: ] 179; CHECK: common.ret: 180; CHECK-NEXT: ret void 181; CHECK: T: 182; CHECK-NEXT: call void @foo1() 183; CHECK-NEXT: br label [[COMMON_RET:%.*]] 184; CHECK: F: 185; CHECK-NEXT: call void @foo2() 186; CHECK-NEXT: br label [[COMMON_RET]] 187; 188 %C1 = icmp eq i32 %V, 4 ; <i1> [#uses=1] 189 br i1 %C1, label %T, label %N 190N: ; preds = %0 191 %C2 = icmp eq i32 %V, 17 ; <i1> [#uses=1] 192 br i1 %C2, label %T, label %F 193T: ; preds = %N, %0 194 call void @foo1( ) 195 ret void 196F: ; preds = %N 197 call void @foo2( ) 198 ret void 199 200} 201 202 203 204define i32 @test4(i8 zeroext %c) nounwind ssp noredzone { 205; CHECK-LABEL: @test4( 206; CHECK-NEXT: entry: 207; CHECK-NEXT: switch i8 [[C:%.*]], label [[LOR_RHS:%.*]] [ 208; CHECK-NEXT: i8 62, label [[LOR_END:%.*]] 209; CHECK-NEXT: i8 34, label [[LOR_END]] 210; CHECK-NEXT: i8 92, label [[LOR_END]] 211; CHECK-NEXT: ] 212; CHECK: lor.rhs: 213; CHECK-NEXT: br label [[LOR_END]] 214; CHECK: lor.end: 215; CHECK-NEXT: [[TMP0:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ false, [[LOR_RHS]] ], [ true, [[ENTRY]] ], [ true, [[ENTRY]] ] 216; CHECK-NEXT: [[LOR_EXT:%.*]] = zext i1 [[TMP0]] to i32 217; CHECK-NEXT: ret i32 [[LOR_EXT]] 218; 219entry: 220 %cmp = icmp eq i8 %c, 62 221 br i1 %cmp, label %lor.end, label %lor.lhs.false 222 223lor.lhs.false: ; preds = %entry 224 %cmp4 = icmp eq i8 %c, 34 225 br i1 %cmp4, label %lor.end, label %lor.rhs 226 227lor.rhs: ; preds = %lor.lhs.false 228 %cmp8 = icmp eq i8 %c, 92 229 br label %lor.end 230 231lor.end: ; preds = %lor.rhs, %lor.lhs.false, %entry 232 %0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp8, %lor.rhs ] 233 %lor.ext = zext i1 %0 to i32 234 ret i32 %lor.ext 235 236} 237 238define i32 @test5(i8 zeroext %c) nounwind ssp noredzone { 239; CHECK-LABEL: @test5( 240; CHECK-NEXT: entry: 241; CHECK-NEXT: switch i8 [[C:%.*]], label [[LOR_RHS:%.*]] [ 242; CHECK-NEXT: i8 62, label [[LOR_END:%.*]] 243; CHECK-NEXT: i8 34, label [[LOR_END]] 244; CHECK-NEXT: i8 92, label [[LOR_END]] 245; CHECK-NEXT: ] 246; CHECK: lor.rhs: 247; CHECK-NEXT: br label [[LOR_END]] 248; CHECK: lor.end: 249; CHECK-NEXT: [[TMP0:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ false, [[LOR_RHS]] ], [ true, [[ENTRY]] ], [ true, [[ENTRY]] ] 250; CHECK-NEXT: [[LOR_EXT:%.*]] = zext i1 [[TMP0]] to i32 251; CHECK-NEXT: ret i32 [[LOR_EXT]] 252; 253entry: 254 switch i8 %c, label %lor.rhs [ 255 i8 62, label %lor.end 256 i8 34, label %lor.end 257 i8 92, label %lor.end 258 ] 259 260lor.rhs: ; preds = %entry 261 %V = icmp eq i8 %c, 92 262 br label %lor.end 263 264lor.end: ; preds = %entry, %entry, %entry, %lor.rhs 265 %0 = phi i1 [ true, %entry ], [ %V, %lor.rhs ], [ true, %entry ], [ true, %entry ] 266 %lor.ext = zext i1 %0 to i32 267 ret i32 %lor.ext 268} 269 270 271define i1 @test6(ptr %I) { 272; CHECK-LABEL: @test6( 273; CHECK-NEXT: entry: 274; CHECK-NEXT: [[TMP_1_I:%.*]] = getelementptr { i32, i32 }, ptr [[I:%.*]], i64 0, i32 1 275; CHECK-NEXT: [[TMP_2_I:%.*]] = load i32, ptr [[TMP_1_I]], align 4 276; CHECK-NEXT: [[TMP_2_I_OFF:%.*]] = add i32 [[TMP_2_I]], -14 277; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[TMP_2_I_OFF]], 6 278; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[SWITCH]], i1 true, i1 false 279; CHECK-NEXT: ret i1 [[SPEC_SELECT]] 280; 281entry: 282 %tmp.1.i = getelementptr { i32, i32 }, ptr %I, i64 0, i32 1 ; <ptr> [#uses=1] 283 %tmp.2.i = load i32, ptr %tmp.1.i ; <i32> [#uses=6] 284 %tmp.2 = icmp eq i32 %tmp.2.i, 14 ; <i1> [#uses=1] 285 br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0 286shortcirc_next.0: ; preds = %entry 287 %tmp.6 = icmp eq i32 %tmp.2.i, 15 ; <i1> [#uses=1] 288 br i1 %tmp.6, label %shortcirc_done.4, label %shortcirc_next.1 289shortcirc_next.1: ; preds = %shortcirc_next.0 290 %tmp.11 = icmp eq i32 %tmp.2.i, 16 ; <i1> [#uses=1] 291 br i1 %tmp.11, label %shortcirc_done.4, label %shortcirc_next.2 292shortcirc_next.2: ; preds = %shortcirc_next.1 293 %tmp.16 = icmp eq i32 %tmp.2.i, 17 ; <i1> [#uses=1] 294 br i1 %tmp.16, label %shortcirc_done.4, label %shortcirc_next.3 295shortcirc_next.3: ; preds = %shortcirc_next.2 296 %tmp.21 = icmp eq i32 %tmp.2.i, 18 ; <i1> [#uses=1] 297 br i1 %tmp.21, label %shortcirc_done.4, label %shortcirc_next.4 298shortcirc_next.4: ; preds = %shortcirc_next.3 299 %tmp.26 = icmp eq i32 %tmp.2.i, 19 ; <i1> [#uses=1] 300 br label %UnifiedReturnBlock 301shortcirc_done.4: ; preds = %shortcirc_next.3, %shortcirc_next.2, %shortcirc_next.1, %shortcirc_next.0, %entry 302 br label %UnifiedReturnBlock 303UnifiedReturnBlock: ; preds = %shortcirc_done.4, %shortcirc_next.4 304 %UnifiedRetVal = phi i1 [ %tmp.26, %shortcirc_next.4 ], [ true, %shortcirc_done.4 ] ; <i1> [#uses=1] 305 ret i1 %UnifiedRetVal 306 307} 308 309define void @test7(i8 zeroext %c, i32 %x) nounwind ssp noredzone { 310; CHECK-LABEL: @test7( 311; CHECK-NEXT: entry: 312; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], 32 313; CHECK-NEXT: [[TMP0:%.*]] = freeze i1 [[CMP]] 314; CHECK-NEXT: br i1 [[TMP0]], label [[IF_THEN:%.*]], label [[SWITCH_EARLY_TEST:%.*]] 315; CHECK: switch.early.test: 316; CHECK-NEXT: switch i8 [[C:%.*]], label [[COMMON_RET:%.*]] [ 317; CHECK-NEXT: i8 99, label [[IF_THEN]] 318; CHECK-NEXT: i8 97, label [[IF_THEN]] 319; CHECK-NEXT: ] 320; CHECK: common.ret: 321; CHECK-NEXT: ret void 322; CHECK: if.then: 323; CHECK-NEXT: tail call void @foo1() #[[ATTR2:[0-9]+]] 324; CHECK-NEXT: br label [[COMMON_RET]] 325; 326entry: 327 %cmp = icmp ult i32 %x, 32 328 %cmp4 = icmp eq i8 %c, 97 329 %or.cond = or i1 %cmp, %cmp4 330 %cmp9 = icmp eq i8 %c, 99 331 %or.cond11 = or i1 %or.cond, %cmp9 332 br i1 %or.cond11, label %if.then, label %if.end 333 334if.then: ; preds = %entry 335 tail call void @foo1() nounwind noredzone 336 ret void 337 338if.end: ; preds = %entry 339 ret void 340 341} 342 343define i32 @test8(i8 zeroext %c, i32 %x, i1 %C) nounwind ssp noredzone { 344; CHECK-LABEL: @test8( 345; CHECK-NEXT: entry: 346; CHECK-NEXT: br i1 [[C:%.*]], label [[N:%.*]], label [[IF_THEN:%.*]] 347; CHECK: N: 348; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], 32 349; CHECK-NEXT: [[TMP0:%.*]] = freeze i1 [[CMP]] 350; CHECK-NEXT: br i1 [[TMP0]], label [[IF_THEN]], label [[SWITCH_EARLY_TEST:%.*]] 351; CHECK: switch.early.test: 352; CHECK-NEXT: switch i8 [[C:%.*]], label [[COMMON_RET:%.*]] [ 353; CHECK-NEXT: i8 99, label [[IF_THEN]] 354; CHECK-NEXT: i8 97, label [[IF_THEN]] 355; CHECK-NEXT: ] 356; CHECK: common.ret: 357; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ [[A:%.*]], [[IF_THEN]] ], [ 0, [[SWITCH_EARLY_TEST]] ] 358; CHECK-NEXT: ret i32 [[COMMON_RET_OP]] 359; CHECK: if.then: 360; CHECK-NEXT: [[A]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ 42, [[SWITCH_EARLY_TEST]] ], [ 42, [[N]] ], [ 42, [[SWITCH_EARLY_TEST]] ] 361; CHECK-NEXT: tail call void @foo1() #[[ATTR2]] 362; CHECK-NEXT: br label [[COMMON_RET]] 363; 364entry: 365 br i1 %C, label %N, label %if.then 366N: 367 %cmp = icmp ult i32 %x, 32 368 %cmp4 = icmp eq i8 %c, 97 369 %or.cond = or i1 %cmp, %cmp4 370 %cmp9 = icmp eq i8 %c, 99 371 %or.cond11 = or i1 %or.cond, %cmp9 372 br i1 %or.cond11, label %if.then, label %if.end 373 374if.then: ; preds = %entry 375 %A = phi i32 [0, %entry], [42, %N] 376 tail call void @foo1() nounwind noredzone 377 ret i32 %A 378 379if.end: ; preds = %entry 380 ret i32 0 381 382} 383 384;; This is "Example 7" from http://blog.regehr.org/archives/320 385define i32 @test9(i8 zeroext %c) nounwind ssp noredzone { 386; CHECK-LABEL: @test9( 387; CHECK-NEXT: entry: 388; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[C:%.*]], 33 389; CHECK-NEXT: [[TMP0:%.*]] = freeze i1 [[CMP]] 390; CHECK-NEXT: br i1 [[TMP0]], label [[LOR_END:%.*]], label [[SWITCH_EARLY_TEST:%.*]] 391; CHECK: switch.early.test: 392; CHECK-NEXT: switch i8 [[C]], label [[LOR_RHS:%.*]] [ 393; CHECK-NEXT: i8 92, label [[LOR_END]] 394; CHECK-NEXT: i8 62, label [[LOR_END]] 395; CHECK-NEXT: i8 60, label [[LOR_END]] 396; CHECK-NEXT: i8 59, label [[LOR_END]] 397; CHECK-NEXT: i8 58, label [[LOR_END]] 398; CHECK-NEXT: i8 46, label [[LOR_END]] 399; CHECK-NEXT: i8 44, label [[LOR_END]] 400; CHECK-NEXT: i8 34, label [[LOR_END]] 401; CHECK-NEXT: i8 39, label [[LOR_END]] 402; CHECK-NEXT: ] 403; CHECK: lor.rhs: 404; CHECK-NEXT: br label [[LOR_END]] 405; CHECK: lor.end: 406; CHECK-NEXT: [[TMP1:%.*]] = phi i1 [ true, [[SWITCH_EARLY_TEST]] ], [ false, [[LOR_RHS]] ], [ true, [[ENTRY:%.*]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ], [ true, [[SWITCH_EARLY_TEST]] ] 407; CHECK-NEXT: [[CONV46:%.*]] = zext i1 [[TMP1]] to i32 408; CHECK-NEXT: ret i32 [[CONV46]] 409; 410entry: 411 %cmp = icmp ult i8 %c, 33 412 br i1 %cmp, label %lor.end, label %lor.lhs.false 413 414lor.lhs.false: ; preds = %entry 415 %cmp4 = icmp eq i8 %c, 46 416 br i1 %cmp4, label %lor.end, label %lor.lhs.false6 417 418lor.lhs.false6: ; preds = %lor.lhs.false 419 %cmp9 = icmp eq i8 %c, 44 420 br i1 %cmp9, label %lor.end, label %lor.lhs.false11 421 422lor.lhs.false11: ; preds = %lor.lhs.false6 423 %cmp14 = icmp eq i8 %c, 58 424 br i1 %cmp14, label %lor.end, label %lor.lhs.false16 425 426lor.lhs.false16: ; preds = %lor.lhs.false11 427 %cmp19 = icmp eq i8 %c, 59 428 br i1 %cmp19, label %lor.end, label %lor.lhs.false21 429 430lor.lhs.false21: ; preds = %lor.lhs.false16 431 %cmp24 = icmp eq i8 %c, 60 432 br i1 %cmp24, label %lor.end, label %lor.lhs.false26 433 434lor.lhs.false26: ; preds = %lor.lhs.false21 435 %cmp29 = icmp eq i8 %c, 62 436 br i1 %cmp29, label %lor.end, label %lor.lhs.false31 437 438lor.lhs.false31: ; preds = %lor.lhs.false26 439 %cmp34 = icmp eq i8 %c, 34 440 br i1 %cmp34, label %lor.end, label %lor.lhs.false36 441 442lor.lhs.false36: ; preds = %lor.lhs.false31 443 %cmp39 = icmp eq i8 %c, 92 444 br i1 %cmp39, label %lor.end, label %lor.rhs 445 446lor.rhs: ; preds = %lor.lhs.false36 447 %cmp43 = icmp eq i8 %c, 39 448 br label %lor.end 449 450lor.end: ; preds = %lor.rhs, %lor.lhs.false36, %lor.lhs.false31, %lor.lhs.false26, %lor.lhs.false21, %lor.lhs.false16, %lor.lhs.false11, %lor.lhs.false6, %lor.lhs.false, %entry 451 %0 = phi i1 [ true, %lor.lhs.false36 ], [ true, %lor.lhs.false31 ], [ true, %lor.lhs.false26 ], [ true, %lor.lhs.false21 ], [ true, %lor.lhs.false16 ], [ true, %lor.lhs.false11 ], [ true, %lor.lhs.false6 ], [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp43, %lor.rhs ] 452 %conv46 = zext i1 %0 to i32 453 ret i32 %conv46 454 455 456} 457 458define i32 @test10(i32 %mode, i1 %Cond) { 459; CHECK-LABEL: @test10( 460; CHECK-NEXT: [[TMP1:%.*]] = freeze i1 [[COND:%.*]] 461; CHECK-NEXT: br i1 [[TMP1]], label [[SWITCH_EARLY_TEST:%.*]], label [[F:%.*]] 462; CHECK: switch.early.test: 463; CHECK-NEXT: switch i32 [[MODE:%.*]], label [[T:%.*]] [ 464; CHECK-NEXT: i32 51, label [[F]] 465; CHECK-NEXT: i32 0, label [[F]] 466; CHECK-NEXT: ] 467; CHECK: common.ret: 468; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ 123, [[T]] ], [ 324, [[F]] ] 469; CHECK-NEXT: ret i32 [[COMMON_RET_OP]] 470; CHECK: T: 471; CHECK-NEXT: call void @foo1() 472; CHECK-NEXT: br label [[COMMON_RET:%.*]] 473; CHECK: F: 474; CHECK-NEXT: call void @foo2() 475; CHECK-NEXT: br label [[COMMON_RET]] 476; 477 %A = icmp ne i32 %mode, 0 478 %B = icmp ne i32 %mode, 51 479 %C = and i1 %A, %B 480 %D = and i1 %C, %Cond 481 br i1 %D, label %T, label %F 482T: 483 call void @foo1() 484 ret i32 123 485F: 486 call void @foo2() 487 ret i32 324 488 489} 490 491define i32 @test10_select(i32 %mode, i1 %Cond) { 492; CHECK-LABEL: @test10_select( 493; CHECK-NEXT: [[TMP1:%.*]] = freeze i1 [[COND:%.*]] 494; CHECK-NEXT: br i1 [[TMP1]], label [[SWITCH_EARLY_TEST:%.*]], label [[F:%.*]] 495; CHECK: switch.early.test: 496; CHECK-NEXT: switch i32 [[MODE:%.*]], label [[T:%.*]] [ 497; CHECK-NEXT: i32 51, label [[F]] 498; CHECK-NEXT: i32 0, label [[F]] 499; CHECK-NEXT: ] 500; CHECK: common.ret: 501; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ 123, [[T]] ], [ 324, [[F]] ] 502; CHECK-NEXT: ret i32 [[COMMON_RET_OP]] 503; CHECK: T: 504; CHECK-NEXT: call void @foo1() 505; CHECK-NEXT: br label [[COMMON_RET:%.*]] 506; CHECK: F: 507; CHECK-NEXT: call void @foo2() 508; CHECK-NEXT: br label [[COMMON_RET]] 509; 510 %A = icmp ne i32 %mode, 0 511 %B = icmp ne i32 %mode, 51 512 %C = select i1 %A, i1 %B, i1 false 513 %D = select i1 %C, i1 %Cond, i1 false 514 br i1 %D, label %T, label %F 515T: 516 call void @foo1() 517 ret i32 123 518F: 519 call void @foo2() 520 ret i32 324 521 522} 523 524; TODO: %Cond doesn't need freeze 525define i32 @test10_select_and(i32 %mode, i1 %Cond) { 526; CHECK-LABEL: @test10_select_and( 527; CHECK-NEXT: [[TMP1:%.*]] = freeze i1 [[COND:%.*]] 528; CHECK-NEXT: br i1 [[TMP1]], label [[SWITCH_EARLY_TEST:%.*]], label [[F:%.*]] 529; CHECK: switch.early.test: 530; CHECK-NEXT: switch i32 [[MODE:%.*]], label [[T:%.*]] [ 531; CHECK-NEXT: i32 51, label [[F]] 532; CHECK-NEXT: i32 0, label [[F]] 533; CHECK-NEXT: ] 534; CHECK: common.ret: 535; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ 123, [[T]] ], [ 324, [[F]] ] 536; CHECK-NEXT: ret i32 [[COMMON_RET_OP]] 537; CHECK: T: 538; CHECK-NEXT: call void @foo1() 539; CHECK-NEXT: br label [[COMMON_RET:%.*]] 540; CHECK: F: 541; CHECK-NEXT: call void @foo2() 542; CHECK-NEXT: br label [[COMMON_RET]] 543; 544 %A = icmp ne i32 %mode, 0 545 %B = icmp ne i32 %mode, 51 546 %C = select i1 %A, i1 %B, i1 false 547 %D = and i1 %C, %Cond 548 br i1 %D, label %T, label %F 549T: 550 call void @foo1() 551 ret i32 123 552F: 553 call void @foo2() 554 ret i32 324 555 556} 557 558define i32 @test10_select_nofreeze(i32 %mode, i1 noundef %Cond) { 559; CHECK-LABEL: @test10_select_nofreeze( 560; CHECK-NEXT: br i1 [[COND:%.*]], label [[SWITCH_EARLY_TEST:%.*]], label [[F:%.*]] 561; CHECK: switch.early.test: 562; CHECK-NEXT: switch i32 [[MODE:%.*]], label [[T:%.*]] [ 563; CHECK-NEXT: i32 51, label [[F]] 564; CHECK-NEXT: i32 0, label [[F]] 565; CHECK-NEXT: ] 566; CHECK: common.ret: 567; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = phi i32 [ 123, [[T]] ], [ 324, [[F]] ] 568; CHECK-NEXT: ret i32 [[COMMON_RET_OP]] 569; CHECK: T: 570; CHECK-NEXT: call void @foo1() 571; CHECK-NEXT: br label [[COMMON_RET:%.*]] 572; CHECK: F: 573; CHECK-NEXT: call void @foo2() 574; CHECK-NEXT: br label [[COMMON_RET]] 575; 576 %A = icmp ne i32 %mode, 0 577 %B = icmp ne i32 %mode, 51 578 %C = select i1 %A, i1 %B, i1 false 579 %D = select i1 %C, i1 %Cond, i1 false 580 br i1 %D, label %T, label %F 581T: 582 call void @foo1() 583 ret i32 123 584F: 585 call void @foo2() 586 ret i32 324 587 588} 589 590; PR8780 591define i32 @test11(i32 %bar) nounwind { 592; CHECK-LABEL: @test11( 593; CHECK-NEXT: entry: 594; CHECK-NEXT: switch i32 [[BAR:%.*]], label [[IF_END:%.*]] [ 595; CHECK-NEXT: i32 55, label [[RETURN:%.*]] 596; CHECK-NEXT: i32 53, label [[RETURN]] 597; CHECK-NEXT: i32 35, label [[RETURN]] 598; CHECK-NEXT: i32 24, label [[RETURN]] 599; CHECK-NEXT: i32 23, label [[RETURN]] 600; CHECK-NEXT: i32 12, label [[RETURN]] 601; CHECK-NEXT: i32 4, label [[RETURN]] 602; CHECK-NEXT: ] 603; CHECK: if.end: 604; CHECK-NEXT: br label [[RETURN]] 605; CHECK: return: 606; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 0, [[IF_END]] ], [ 1, [[ENTRY:%.*]] ], [ 1, [[ENTRY]] ], [ 1, [[ENTRY]] ], [ 1, [[ENTRY]] ], [ 1, [[ENTRY]] ], [ 1, [[ENTRY]] ], [ 1, [[ENTRY]] ] 607; CHECK-NEXT: ret i32 [[RETVAL_0]] 608; 609entry: 610 %cmp = icmp eq i32 %bar, 4 611 %cmp2 = icmp eq i32 %bar, 35 612 %or.cond = or i1 %cmp, %cmp2 613 %cmp5 = icmp eq i32 %bar, 53 614 %or.cond1 = or i1 %or.cond, %cmp5 615 %cmp8 = icmp eq i32 %bar, 24 616 %or.cond2 = or i1 %or.cond1, %cmp8 617 %cmp11 = icmp eq i32 %bar, 23 618 %or.cond3 = or i1 %or.cond2, %cmp11 619 %cmp14 = icmp eq i32 %bar, 55 620 %or.cond4 = or i1 %or.cond3, %cmp14 621 %cmp17 = icmp eq i32 %bar, 12 622 %or.cond5 = or i1 %or.cond4, %cmp17 623 %cmp20 = icmp eq i32 %bar, 35 624 %or.cond6 = or i1 %or.cond5, %cmp20 625 br i1 %or.cond6, label %if.then, label %if.end 626 627if.then: ; preds = %entry 628 br label %return 629 630if.end: ; preds = %entry 631 br label %return 632 633return: ; preds = %if.end, %if.then 634 %retval.0 = phi i32 [ 1, %if.then ], [ 0, %if.end ] 635 ret i32 %retval.0 636 637} 638 639define void @test12() nounwind { 640; CHECK-LABEL: @test12( 641; CHECK-NEXT: entry: 642; CHECK-NEXT: [[A_OLD:%.*]] = icmp eq i32 undef, undef 643; CHECK-NEXT: br i1 [[A_OLD]], label [[BB55_US_US:%.*]], label [[MALFORMED:%.*]] 644; CHECK: bb55.us.us: 645; CHECK-NEXT: [[B:%.*]] = icmp ugt i32 undef, undef 646; CHECK-NEXT: [[A:%.*]] = icmp eq i32 undef, undef 647; CHECK-NEXT: [[OR_COND:%.*]] = or i1 [[B]], [[A]] 648; CHECK-NEXT: br i1 [[OR_COND]], label [[BB55_US_US]], label [[MALFORMED]] 649; CHECK: malformed: 650; CHECK-NEXT: ret void 651; 652entry: 653 br label %bb49.us.us 654 655bb49.us.us: 656 %A = icmp eq i32 undef, undef 657 br i1 %A, label %bb55.us.us, label %malformed 658 659bb48.us.us: 660 %B = icmp ugt i32 undef, undef 661 br i1 %B, label %bb55.us.us, label %bb49.us.us 662 663bb55.us.us: 664 br label %bb48.us.us 665 666malformed: 667 ret void 668 669} 670 671; test13 - handle switch formation with ult. 672define void @test13(i32 %x) nounwind ssp noredzone { 673; CHECK-LABEL: @test13( 674; CHECK-NEXT: entry: 675; CHECK-NEXT: switch i32 [[X:%.*]], label [[IF_END:%.*]] [ 676; CHECK-NEXT: i32 6, label [[IF_THEN:%.*]] 677; CHECK-NEXT: i32 4, label [[IF_THEN]] 678; CHECK-NEXT: i32 3, label [[IF_THEN]] 679; CHECK-NEXT: i32 1, label [[IF_THEN]] 680; CHECK-NEXT: i32 0, label [[IF_THEN]] 681; CHECK-NEXT: ] 682; CHECK: if.then: 683; CHECK-NEXT: call void @foo1() #[[ATTR3:[0-9]+]] 684; CHECK-NEXT: br label [[IF_END]] 685; CHECK: if.end: 686; CHECK-NEXT: ret void 687; 688entry: 689 %cmp = icmp ult i32 %x, 2 690 br i1 %cmp, label %if.then, label %lor.lhs.false3 691 692lor.lhs.false3: ; preds = %lor.lhs.false 693 %cmp5 = icmp eq i32 %x, 3 694 br i1 %cmp5, label %if.then, label %lor.lhs.false6 695 696lor.lhs.false6: ; preds = %lor.lhs.false3 697 %cmp8 = icmp eq i32 %x, 4 698 br i1 %cmp8, label %if.then, label %lor.lhs.false9 699 700lor.lhs.false9: ; preds = %lor.lhs.false6 701 %cmp11 = icmp eq i32 %x, 6 702 br i1 %cmp11, label %if.then, label %if.end 703 704if.then: ; preds = %lor.lhs.false9, %lor.lhs.false6, %lor.lhs.false3, %lor.lhs.false, %entry 705 call void @foo1() noredzone 706 br label %if.end 707 708if.end: ; preds = %if.then, %lor.lhs.false9 709 ret void 710} 711 712; test14 - handle switch formation with ult. 713define void @test14(i32 %x) nounwind ssp noredzone { 714; CHECK-LABEL: @test14( 715; CHECK-NEXT: entry: 716; CHECK-NEXT: switch i32 [[X:%.*]], label [[IF_END:%.*]] [ 717; CHECK-NEXT: i32 6, label [[IF_THEN:%.*]] 718; CHECK-NEXT: i32 4, label [[IF_THEN]] 719; CHECK-NEXT: i32 3, label [[IF_THEN]] 720; CHECK-NEXT: i32 2, label [[IF_THEN]] 721; CHECK-NEXT: i32 1, label [[IF_THEN]] 722; CHECK-NEXT: i32 0, label [[IF_THEN]] 723; CHECK-NEXT: ] 724; CHECK: if.then: 725; CHECK-NEXT: call void @foo1() #[[ATTR3]] 726; CHECK-NEXT: br label [[IF_END]] 727; CHECK: if.end: 728; CHECK-NEXT: ret void 729; 730entry: 731 %cmp = icmp ugt i32 %x, 2 732 br i1 %cmp, label %lor.lhs.false3, label %if.then 733 734lor.lhs.false3: ; preds = %lor.lhs.false 735 %cmp5 = icmp ne i32 %x, 3 736 br i1 %cmp5, label %lor.lhs.false6, label %if.then 737 738lor.lhs.false6: ; preds = %lor.lhs.false3 739 %cmp8 = icmp ne i32 %x, 4 740 br i1 %cmp8, label %lor.lhs.false9, label %if.then 741 742lor.lhs.false9: ; preds = %lor.lhs.false6 743 %cmp11 = icmp ne i32 %x, 6 744 br i1 %cmp11, label %if.end, label %if.then 745 746if.then: ; preds = %lor.lhs.false9, %lor.lhs.false6, %lor.lhs.false3, %lor.lhs.false, %entry 747 call void @foo1() noredzone 748 br label %if.end 749 750if.end: ; preds = %if.then, %lor.lhs.false9 751 ret void 752} 753 754; Don't crash on ginormous ranges. 755define void @test15(i128 %x) nounwind { 756; CHECK-LABEL: @test15( 757; CHECK-NEXT: if.end: 758; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i128 [[X:%.*]], 2 759; CHECK-NEXT: ret void 760; 761 %cmp = icmp ugt i128 %x, 2 762 br i1 %cmp, label %if.end, label %lor.false 763 764lor.false: 765 %cmp2 = icmp ne i128 %x, 100000000000000000000 766 br i1 %cmp2, label %if.end, label %if.then 767 768if.then: 769 call void @foo1() noredzone 770 br label %if.end 771 772if.end: 773 ret void 774 775} 776 777; PR8675 778; rdar://5134905 779define zeroext i1 @test16(i32 %x) nounwind { 780; CHECK-LABEL: @test16( 781; CHECK-NEXT: entry: 782; CHECK-NEXT: [[X_OFF:%.*]] = add i32 [[X:%.*]], -1 783; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[X_OFF]], 3 784; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[SWITCH]], i1 true, i1 false 785; CHECK-NEXT: ret i1 [[SPEC_SELECT]] 786; 787entry: 788 %cmp.i = icmp eq i32 %x, 1 789 br i1 %cmp.i, label %lor.end, label %lor.lhs.false 790 791lor.lhs.false: 792 %cmp.i2 = icmp eq i32 %x, 2 793 br i1 %cmp.i2, label %lor.end, label %lor.rhs 794 795lor.rhs: 796 %cmp.i1 = icmp eq i32 %x, 3 797 br label %lor.end 798 799lor.end: 800 %0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp.i1, %lor.rhs ] 801 ret i1 %0 802} 803 804; Check that we don't turn an icmp into a switch where it's not useful. 805define void @test17(i32 %x, i32 %y) { 806; CHECK-LABEL: @test17( 807; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], 3 808; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[Y:%.*]], 2 809; CHECK-NEXT: [[OR_COND775:%.*]] = or i1 [[CMP]], [[SWITCH]] 810; CHECK-NEXT: br i1 [[OR_COND775]], label [[LOR_LHS_FALSE8:%.*]], label [[COMMON_RET:%.*]] 811; CHECK: common.ret: 812; CHECK-NEXT: ret void 813; CHECK: lor.lhs.false8: 814; CHECK-NEXT: tail call void @foo1() 815; CHECK-NEXT: br label [[COMMON_RET]] 816; 817 %cmp = icmp ult i32 %x, 3 818 %switch = icmp ult i32 %y, 2 819 %or.cond775 = or i1 %cmp, %switch 820 br i1 %or.cond775, label %lor.lhs.false8, label %return 821 822lor.lhs.false8: 823 tail call void @foo1() 824 ret void 825 826return: 827 ret void 828 829} 830 831define void @test17_select(i32 %x, i32 %y) { 832; CHECK-LABEL: @test17_select( 833; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], 3 834; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[Y:%.*]], 2 835; CHECK-NEXT: [[OR_COND775:%.*]] = select i1 [[CMP]], i1 true, i1 [[SWITCH]] 836; CHECK-NEXT: br i1 [[OR_COND775]], label [[LOR_LHS_FALSE8:%.*]], label [[COMMON_RET:%.*]] 837; CHECK: common.ret: 838; CHECK-NEXT: ret void 839; CHECK: lor.lhs.false8: 840; CHECK-NEXT: tail call void @foo1() 841; CHECK-NEXT: br label [[COMMON_RET]] 842; 843 %cmp = icmp ult i32 %x, 3 844 %switch = icmp ult i32 %y, 2 845 %or.cond775 = select i1 %cmp, i1 true, i1 %switch 846 br i1 %or.cond775, label %lor.lhs.false8, label %return 847 848lor.lhs.false8: 849 tail call void @foo1() 850 ret void 851 852return: 853 ret void 854 855} 856 857define void @test18(i32 %arg) { 858; CHECK-LABEL: @test18( 859; CHECK-NEXT: bb: 860; CHECK-NEXT: [[ARG_OFF:%.*]] = add i32 [[ARG:%.*]], -8 861; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[ARG_OFF]], 11 862; CHECK-NEXT: br i1 [[SWITCH]], label [[BB19:%.*]], label [[BB20:%.*]] 863; CHECK: bb19: 864; CHECK-NEXT: tail call void @foo1() 865; CHECK-NEXT: br label [[BB20]] 866; CHECK: bb20: 867; CHECK-NEXT: ret void 868; 869bb: 870 %tmp = and i32 %arg, -2 871 %tmp1 = icmp eq i32 %tmp, 8 872 %tmp2 = icmp eq i32 %arg, 10 873 %tmp3 = or i1 %tmp1, %tmp2 874 %tmp4 = icmp eq i32 %arg, 11 875 %tmp5 = or i1 %tmp3, %tmp4 876 %tmp6 = icmp eq i32 %arg, 12 877 %tmp7 = or i1 %tmp5, %tmp6 878 br i1 %tmp7, label %bb19, label %bb8 879 880bb8: ; preds = %bb 881 %tmp9 = add i32 %arg, -13 882 %tmp10 = icmp ult i32 %tmp9, 2 883 %tmp11 = icmp eq i32 %arg, 16 884 %tmp12 = or i1 %tmp10, %tmp11 885 %tmp13 = icmp eq i32 %arg, 17 886 %tmp14 = or i1 %tmp12, %tmp13 887 %tmp15 = icmp eq i32 %arg, 18 888 %tmp16 = or i1 %tmp14, %tmp15 889 %tmp17 = icmp eq i32 %arg, 15 890 %tmp18 = or i1 %tmp16, %tmp17 891 br i1 %tmp18, label %bb19, label %bb20 892 893bb19: ; preds = %bb8, %bb 894 tail call void @foo1() 895 br label %bb20 896 897bb20: ; preds = %bb19, %bb8 898 ret void 899 900} 901 902define void @PR26323(i1 %tobool23, i32 %tmp3) { 903; CHECK-LABEL: @PR26323( 904; CHECK-NEXT: entry: 905; CHECK-NEXT: [[TOBOOL5:%.*]] = icmp ne i32 [[TMP3:%.*]], 0 906; CHECK-NEXT: [[NEG14:%.*]] = and i32 [[TMP3]], -2 907; CHECK-NEXT: [[CMP17:%.*]] = icmp ne i32 [[NEG14]], -1 908; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[TOBOOL5]], [[TOBOOL23:%.*]] 909; CHECK-NEXT: [[OR_COND1:%.*]] = and i1 [[CMP17]], [[OR_COND]] 910; CHECK-NEXT: br i1 [[OR_COND1]], label [[IF_END29:%.*]], label [[IF_THEN27:%.*]] 911; CHECK: if.then27: 912; CHECK-NEXT: call void @foo1() 913; CHECK-NEXT: unreachable 914; CHECK: if.end29: 915; CHECK-NEXT: ret void 916; 917entry: 918 %tobool5 = icmp ne i32 %tmp3, 0 919 %neg14 = and i32 %tmp3, -2 920 %cmp17 = icmp ne i32 %neg14, -1 921 %or.cond = and i1 %tobool5, %tobool23 922 %or.cond1 = and i1 %cmp17, %or.cond 923 br i1 %or.cond1, label %if.end29, label %if.then27 924 925if.then27: ; preds = %entry 926 call void @foo1() 927 unreachable 928 929if.end29: ; preds = %entry 930 ret void 931} 932 933; Form a switch when and'ing a negated power of two 934define void @test19(i32 %arg) { 935; CHECK-LABEL: @test19( 936; CHECK-NEXT: switch i32 [[ARG:%.*]], label [[COMMON_RET:%.*]] [ 937; CHECK-NEXT: i32 32, label [[IF:%.*]] 938; CHECK-NEXT: i32 13, label [[IF]] 939; CHECK-NEXT: i32 12, label [[IF]] 940; CHECK-NEXT: ] 941; CHECK: common.ret: 942; CHECK-NEXT: ret void 943; CHECK: if: 944; CHECK-NEXT: call void @foo1() 945; CHECK-NEXT: br label [[COMMON_RET]] 946; 947 %and = and i32 %arg, -2 948 %cmp1 = icmp eq i32 %and, 12 949 %cmp2 = icmp eq i32 %arg, 32 950 %pred = or i1 %cmp1, %cmp2 951 br i1 %pred, label %if, label %else 952 953if: 954 call void @foo1() 955 ret void 956 957else: 958 ret void 959} 960 961define void @test19_select(i32 %arg) { 962; CHECK-LABEL: @test19_select( 963; CHECK-NEXT: switch i32 [[ARG:%.*]], label [[COMMON_RET:%.*]] [ 964; CHECK-NEXT: i32 32, label [[IF:%.*]] 965; CHECK-NEXT: i32 13, label [[IF]] 966; CHECK-NEXT: i32 12, label [[IF]] 967; CHECK-NEXT: ] 968; CHECK: common.ret: 969; CHECK-NEXT: ret void 970; CHECK: if: 971; CHECK-NEXT: call void @foo1() 972; CHECK-NEXT: br label [[COMMON_RET]] 973; 974 %and = and i32 %arg, -2 975 %cmp1 = icmp eq i32 %and, 12 976 %cmp2 = icmp eq i32 %arg, 32 977 %pred = select i1 %cmp1, i1 true, i1 %cmp2 978 br i1 %pred, label %if, label %else 979 980if: 981 call void @foo1() 982 ret void 983 984else: 985 ret void 986} 987 988; Since %cmp1 is always false, a switch is never formed 989define void @test20(i32 %arg) { 990; CHECK-LABEL: @test20( 991; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARG:%.*]], -2 992; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[AND]], 13 993; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[ARG]], 32 994; CHECK-NEXT: [[PRED:%.*]] = or i1 [[CMP1]], [[CMP2]] 995; CHECK-NEXT: br i1 [[PRED]], label [[IF:%.*]], label [[COMMON_RET:%.*]] 996; CHECK: common.ret: 997; CHECK-NEXT: ret void 998; CHECK: if: 999; CHECK-NEXT: call void @foo1() 1000; CHECK-NEXT: br label [[COMMON_RET]] 1001; 1002 %and = and i32 %arg, -2 1003 %cmp1 = icmp eq i32 %and, 13 1004 %cmp2 = icmp eq i32 %arg, 32 1005 %pred = or i1 %cmp1, %cmp2 1006 br i1 %pred, label %if, label %else 1007 1008if: 1009 call void @foo1() 1010 ret void 1011 1012else: 1013 ret void 1014} 1015 1016; Form a switch when or'ing a power of two 1017define void @test21(i32 %arg) { 1018; CHECK-LABEL: @test21( 1019; CHECK-NEXT: switch i32 [[ARG:%.*]], label [[IF:%.*]] [ 1020; CHECK-NEXT: i32 32, label [[COMMON_RET:%.*]] 1021; CHECK-NEXT: i32 13, label [[COMMON_RET]] 1022; CHECK-NEXT: i32 12, label [[COMMON_RET]] 1023; CHECK-NEXT: ] 1024; CHECK: common.ret: 1025; CHECK-NEXT: ret void 1026; CHECK: if: 1027; CHECK-NEXT: call void @foo1() 1028; CHECK-NEXT: br label [[COMMON_RET]] 1029; 1030 %and = or i32 %arg, 1 1031 %cmp1 = icmp ne i32 %and, 13 1032 %cmp2 = icmp ne i32 %arg, 32 1033 %pred = and i1 %cmp1, %cmp2 1034 br i1 %pred, label %if, label %else 1035 1036if: 1037 call void @foo1() 1038 ret void 1039 1040else: 1041 ret void 1042} 1043 1044; Since %cmp1 is always false, a switch is never formed 1045define void @test22(i32 %arg) { 1046; CHECK-LABEL: @test22( 1047; CHECK-NEXT: [[AND:%.*]] = or i32 [[ARG:%.*]], 1 1048; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[AND]], 12 1049; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i32 [[ARG]], 32 1050; CHECK-NEXT: [[PRED:%.*]] = and i1 [[CMP1]], [[CMP2]] 1051; CHECK-NEXT: br i1 [[PRED]], label [[IF:%.*]], label [[COMMON_RET:%.*]] 1052; CHECK: common.ret: 1053; CHECK-NEXT: ret void 1054; CHECK: if: 1055; CHECK-NEXT: call void @foo1() 1056; CHECK-NEXT: br label [[COMMON_RET]] 1057; 1058 %and = or i32 %arg, 1 1059 %cmp1 = icmp ne i32 %and, 12 1060 %cmp2 = icmp ne i32 %arg, 32 1061 %pred = and i1 %cmp1, %cmp2 1062 br i1 %pred, label %if, label %else 1063 1064if: 1065 call void @foo1() 1066 ret void 1067 1068else: 1069 ret void 1070} 1071