1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 2; RUN: opt < %s -max-phi-entries-increase-after-removing-empty-block=12 -passes=simplifycfg -S | FileCheck --check-prefixes=CHECK-12 %s 3; RUN: opt < %s -max-phi-entries-increase-after-removing-empty-block=11 -passes=simplifycfg -S | FileCheck --check-prefixes=CHECK-11 %s 4; RUN: opt < %s -max-phi-entries-increase-after-removing-empty-block=4 -passes=simplifycfg -S | FileCheck --check-prefixes=CHECK-4 %s 5; 6; This test has the following CFG: 7; 1. entry has a switch to 4 blocks: B1 - B4 8; 2. For B1 and B2, it branches to B5 and B6 9; 3. For B3 and B4, it branches to B5 and B7 10; 4. In B5, %val is defined as phi taking values from B1 to B4 11; 5. B5, B6, B7 branch to block Merge unconditionally 12; 6. Block Merge has 5 phis(%x1 - %x4 and %val_merge). 13; 14; If we remove B5, %x1 - %x4 will increase the number of phi entries by (4 - 1) * 4 = 12. For %val_merge, since the value taking from B5 15; is defined in B5, it will not increase the number of phi entries (it can be considered as move the entries from %val to 16; %val_merge). Therefore, removing B5 will increase the number of phi entries by 12 (not (4 - 1) * 5 = 15). 17; 18; If we remove B6 / B7, it will increase the number of phi entries by (2 - 1) * 5 = 5. 19; 20; In the first test, max-phi-entries-increase-after-removing-empty-block is set to be 12, then B5 will be removed. 21; In the second test, max-phi-entries-increase-after-removing-empty-block is set to be 11, then B5 should not be removed, 22; but B6 and B7 can be removed. 23; In the third test, max-phi-entries-increase-after-removing-empty-block is set to be 4, then no BB can be removed. 24; 25define void @foo(i32 %a, i32 %val1, i32 %val2, i32 %val3, i32 %val4) { 26; CHECK-12-LABEL: define void @foo( 27; CHECK-12-SAME: i32 [[A:%.*]], i32 [[VAL1:%.*]], i32 [[VAL2:%.*]], i32 [[VAL3:%.*]], i32 [[VAL4:%.*]]) { 28; CHECK-12-NEXT: [[ENTRY:.*:]] 29; CHECK-12-NEXT: switch i32 [[A]], label %[[B1:.*]] [ 30; CHECK-12-NEXT: i32 4, label %[[B4:.*]] 31; CHECK-12-NEXT: i32 2, label %[[B2:.*]] 32; CHECK-12-NEXT: i32 3, label %[[B3:.*]] 33; CHECK-12-NEXT: ] 34; CHECK-12: [[B1]]: 35; CHECK-12-NEXT: [[CMP1:%.*]] = icmp eq i32 [[VAL1]], 1 36; CHECK-12-NEXT: br i1 [[CMP1]], label %[[B6:.*]], label %[[MERGE:.*]] 37; CHECK-12: [[B2]]: 38; CHECK-12-NEXT: [[CMP2:%.*]] = icmp eq i32 [[VAL2]], 2 39; CHECK-12-NEXT: br i1 [[CMP2]], label %[[B6]], label %[[MERGE]] 40; CHECK-12: [[B3]]: 41; CHECK-12-NEXT: [[CMP3:%.*]] = icmp eq i32 [[VAL3]], 3 42; CHECK-12-NEXT: br i1 [[CMP3]], label %[[B7:.*]], label %[[MERGE]] 43; CHECK-12: [[B4]]: 44; CHECK-12-NEXT: [[CMP4:%.*]] = icmp eq i32 [[VAL4]], 4 45; CHECK-12-NEXT: br i1 [[CMP4]], label %[[B7]], label %[[MERGE]] 46; CHECK-12: [[B6]]: 47; CHECK-12-NEXT: br label %[[MERGE]] 48; CHECK-12: [[B7]]: 49; CHECK-12-NEXT: br label %[[MERGE]] 50; CHECK-12: [[MERGE]]: 51; CHECK-12-NEXT: [[X1:%.*]] = phi i16 [ 0, %[[B6]] ], [ 2, %[[B7]] ], [ 1, %[[B4]] ], [ 1, %[[B3]] ], [ 1, %[[B2]] ], [ 1, %[[B1]] ] 52; CHECK-12-NEXT: [[X2:%.*]] = phi i16 [ 0, %[[B6]] ], [ 2, %[[B7]] ], [ 2, %[[B4]] ], [ 2, %[[B3]] ], [ 2, %[[B2]] ], [ 2, %[[B1]] ] 53; CHECK-12-NEXT: [[X3:%.*]] = phi i16 [ 0, %[[B6]] ], [ 2, %[[B7]] ], [ 3, %[[B4]] ], [ 3, %[[B3]] ], [ 3, %[[B2]] ], [ 3, %[[B1]] ] 54; CHECK-12-NEXT: [[X4:%.*]] = phi i16 [ 0, %[[B6]] ], [ 2, %[[B7]] ], [ 4, %[[B4]] ], [ 4, %[[B3]] ], [ 4, %[[B2]] ], [ 4, %[[B1]] ] 55; CHECK-12-NEXT: [[VAL_MERGE:%.*]] = phi i32 [ 0, %[[B6]] ], [ 2, %[[B7]] ], [ [[VAL1]], %[[B1]] ], [ [[VAL2]], %[[B2]] ], [ [[VAL3]], %[[B3]] ], [ [[VAL4]], %[[B4]] ] 56; CHECK-12-NEXT: ret void 57; 58; CHECK-11-LABEL: define void @foo( 59; CHECK-11-SAME: i32 [[A:%.*]], i32 [[VAL1:%.*]], i32 [[VAL2:%.*]], i32 [[VAL3:%.*]], i32 [[VAL4:%.*]]) { 60; CHECK-11-NEXT: [[ENTRY:.*:]] 61; CHECK-11-NEXT: switch i32 [[A]], label %[[B1:.*]] [ 62; CHECK-11-NEXT: i32 4, label %[[B4:.*]] 63; CHECK-11-NEXT: i32 2, label %[[B2:.*]] 64; CHECK-11-NEXT: i32 3, label %[[B3:.*]] 65; CHECK-11-NEXT: ] 66; CHECK-11: [[B1]]: 67; CHECK-11-NEXT: [[CMP1:%.*]] = icmp eq i32 [[VAL1]], 1 68; CHECK-11-NEXT: br i1 [[CMP1]], label %[[MERGE:.*]], label %[[B5:.*]] 69; CHECK-11: [[B2]]: 70; CHECK-11-NEXT: [[CMP2:%.*]] = icmp eq i32 [[VAL2]], 2 71; CHECK-11-NEXT: br i1 [[CMP2]], label %[[MERGE]], label %[[B5]] 72; CHECK-11: [[B3]]: 73; CHECK-11-NEXT: [[CMP3:%.*]] = icmp eq i32 [[VAL3]], 3 74; CHECK-11-NEXT: br i1 [[CMP3]], label %[[MERGE]], label %[[B5]] 75; CHECK-11: [[B4]]: 76; CHECK-11-NEXT: [[CMP4:%.*]] = icmp eq i32 [[VAL4]], 4 77; CHECK-11-NEXT: br i1 [[CMP4]], label %[[MERGE]], label %[[B5]] 78; CHECK-11: [[B5]]: 79; CHECK-11-NEXT: [[VAL:%.*]] = phi i32 [ [[VAL1]], %[[B1]] ], [ [[VAL2]], %[[B2]] ], [ [[VAL3]], %[[B3]] ], [ [[VAL4]], %[[B4]] ] 80; CHECK-11-NEXT: br label %[[MERGE]] 81; CHECK-11: [[MERGE]]: 82; CHECK-11-NEXT: [[X1:%.*]] = phi i16 [ 1, %[[B5]] ], [ 0, %[[B2]] ], [ 0, %[[B1]] ], [ 2, %[[B4]] ], [ 2, %[[B3]] ] 83; CHECK-11-NEXT: [[X2:%.*]] = phi i16 [ 2, %[[B5]] ], [ 0, %[[B2]] ], [ 0, %[[B1]] ], [ 2, %[[B4]] ], [ 2, %[[B3]] ] 84; CHECK-11-NEXT: [[X3:%.*]] = phi i16 [ 3, %[[B5]] ], [ 0, %[[B2]] ], [ 0, %[[B1]] ], [ 2, %[[B4]] ], [ 2, %[[B3]] ] 85; CHECK-11-NEXT: [[X4:%.*]] = phi i16 [ 4, %[[B5]] ], [ 0, %[[B2]] ], [ 0, %[[B1]] ], [ 2, %[[B4]] ], [ 2, %[[B3]] ] 86; CHECK-11-NEXT: [[VAL_MERGE:%.*]] = phi i32 [ [[VAL]], %[[B5]] ], [ 0, %[[B2]] ], [ 0, %[[B1]] ], [ 2, %[[B4]] ], [ 2, %[[B3]] ] 87; CHECK-11-NEXT: ret void 88; 89; CHECK-4-LABEL: define void @foo( 90; CHECK-4-SAME: i32 [[A:%.*]], i32 [[VAL1:%.*]], i32 [[VAL2:%.*]], i32 [[VAL3:%.*]], i32 [[VAL4:%.*]]) { 91; CHECK-4-NEXT: [[ENTRY:.*:]] 92; CHECK-4-NEXT: switch i32 [[A]], label %[[B1:.*]] [ 93; CHECK-4-NEXT: i32 4, label %[[B4:.*]] 94; CHECK-4-NEXT: i32 2, label %[[B2:.*]] 95; CHECK-4-NEXT: i32 3, label %[[B3:.*]] 96; CHECK-4-NEXT: ] 97; CHECK-4: [[B1]]: 98; CHECK-4-NEXT: [[CMP1:%.*]] = icmp eq i32 [[VAL1]], 1 99; CHECK-4-NEXT: br i1 [[CMP1]], label %[[B6:.*]], label %[[B5:.*]] 100; CHECK-4: [[B2]]: 101; CHECK-4-NEXT: [[CMP2:%.*]] = icmp eq i32 [[VAL2]], 2 102; CHECK-4-NEXT: br i1 [[CMP2]], label %[[B6]], label %[[B5]] 103; CHECK-4: [[B3]]: 104; CHECK-4-NEXT: [[CMP3:%.*]] = icmp eq i32 [[VAL3]], 3 105; CHECK-4-NEXT: br i1 [[CMP3]], label %[[B7:.*]], label %[[B5]] 106; CHECK-4: [[B4]]: 107; CHECK-4-NEXT: [[CMP4:%.*]] = icmp eq i32 [[VAL4]], 4 108; CHECK-4-NEXT: br i1 [[CMP4]], label %[[B7]], label %[[B5]] 109; CHECK-4: [[B5]]: 110; CHECK-4-NEXT: [[VAL:%.*]] = phi i32 [ [[VAL1]], %[[B1]] ], [ [[VAL2]], %[[B2]] ], [ [[VAL3]], %[[B3]] ], [ [[VAL4]], %[[B4]] ] 111; CHECK-4-NEXT: br label %[[MERGE:.*]] 112; CHECK-4: [[B6]]: 113; CHECK-4-NEXT: br label %[[MERGE]] 114; CHECK-4: [[B7]]: 115; CHECK-4-NEXT: br label %[[MERGE]] 116; CHECK-4: [[MERGE]]: 117; CHECK-4-NEXT: [[X1:%.*]] = phi i16 [ 1, %[[B5]] ], [ 0, %[[B6]] ], [ 2, %[[B7]] ] 118; CHECK-4-NEXT: [[X2:%.*]] = phi i16 [ 2, %[[B5]] ], [ 0, %[[B6]] ], [ 2, %[[B7]] ] 119; CHECK-4-NEXT: [[X3:%.*]] = phi i16 [ 3, %[[B5]] ], [ 0, %[[B6]] ], [ 2, %[[B7]] ] 120; CHECK-4-NEXT: [[X4:%.*]] = phi i16 [ 4, %[[B5]] ], [ 0, %[[B6]] ], [ 2, %[[B7]] ] 121; CHECK-4-NEXT: [[VAL_MERGE:%.*]] = phi i32 [ [[VAL]], %[[B5]] ], [ 0, %[[B6]] ], [ 2, %[[B7]] ] 122; CHECK-4-NEXT: ret void 123; 124entry: 125 switch i32 %a, label %B1 [ 126 i32 4, label %B4 127 i32 2, label %B2 128 i32 3, label %B3 129 ] 130 131B1: ; preds = %entry 132 %cmp1 = icmp eq i32 %val1, 1 133 br i1 %cmp1, label %B6, label %B5 134 135B2: ; preds = %entry 136 %cmp2 = icmp eq i32 %val2, 2 137 br i1 %cmp2, label %B6, label %B5 138 139B3: ; preds = %entry 140 %cmp3 = icmp eq i32 %val3, 3 141 br i1 %cmp3, label %B7, label %B5 142 143B4: ; preds = %entry 144 %cmp4 = icmp eq i32 %val4, 4 145 br i1 %cmp4, label %B7, label %B5 146 147B5: ; preds = %B4, %B3, %B2, %B1 148 %val = phi i32 [ %val1, %B1 ], [ %val2, %B2 ], [ %val3, %B3 ], [ %val4, %B4 ] 149 br label %Merge 150 151B6: ; preds = %B2, %B1 152 br label %Merge 153 154B7: ; preds = %B4, %B3 155 br label %Merge 156 157Merge: ; preds = %B7, %B6, %B5 158 %x1 = phi i16 [ 1, %B5 ], [ 0, %B6 ], [ 2, %B7 ] 159 %x2 = phi i16 [ 2, %B5 ], [ 0, %B6 ], [ 2, %B7 ] 160 %x3 = phi i16 [ 3, %B5 ], [ 0, %B6 ], [ 2, %B7 ] 161 %x4 = phi i16 [ 4, %B5 ], [ 0, %B6 ], [ 2, %B7 ] 162 %val_merge = phi i32 [ %val, %B5 ], [ 0, %B6 ], [ 2, %B7 ] 163 ret void 164} 165