1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -forward-switch-cond=false -switch-range-to-icmp -S | FileCheck %s --check-prefix=NO_FWD 3; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -forward-switch-cond=true -switch-range-to-icmp -S | FileCheck %s --check-prefix=FWD 4 5; PR10131 6 7define i32 @forward_multiple(i32 %m) { 8; NO_FWD-LABEL: @forward_multiple( 9; NO_FWD-NEXT: entry: 10; NO_FWD-NEXT: switch i32 [[M:%.*]], label [[SW_BB4:%.*]] [ 11; NO_FWD-NEXT: i32 0, label [[RETURN:%.*]] 12; NO_FWD-NEXT: i32 1, label [[SW_BB1:%.*]] 13; NO_FWD-NEXT: i32 2, label [[SW_BB2:%.*]] 14; NO_FWD-NEXT: i32 3, label [[SW_BB3:%.*]] 15; NO_FWD-NEXT: ] 16; NO_FWD: sw.bb1: 17; NO_FWD-NEXT: br label [[RETURN]] 18; NO_FWD: sw.bb2: 19; NO_FWD-NEXT: br label [[RETURN]] 20; NO_FWD: sw.bb3: 21; NO_FWD-NEXT: br label [[RETURN]] 22; NO_FWD: sw.bb4: 23; NO_FWD-NEXT: br label [[RETURN]] 24; NO_FWD: return: 25; NO_FWD-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 4, [[SW_BB4]] ], [ 3, [[SW_BB3]] ], [ 2, [[SW_BB2]] ], [ 1, [[SW_BB1]] ], [ 0, [[ENTRY:%.*]] ] 26; NO_FWD-NEXT: ret i32 [[RETVAL_0]] 27; 28; FWD-LABEL: @forward_multiple( 29; FWD-NEXT: entry: 30; FWD-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[M:%.*]], 4 31; FWD-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[SWITCH]], i32 [[M]], i32 4 32; FWD-NEXT: ret i32 [[SPEC_SELECT]] 33; 34entry: 35 switch i32 %m, label %sw.bb4 [ 36 i32 0, label %sw.bb0 37 i32 1, label %sw.bb1 38 i32 2, label %sw.bb2 39 i32 3, label %sw.bb3 40 ] 41 42sw.bb0: ; preds = %entry 43 br label %return 44 45sw.bb1: ; preds = %entry 46 br label %return 47 48sw.bb2: ; preds = %entry 49 br label %return 50 51sw.bb3: ; preds = %entry 52 br label %return 53 54sw.bb4: ; preds = %entry 55 br label %return 56 57return: ; preds = %entry, %sw.bb4, %sw.bb3, %sw.bb2, %sw.bb1 58 %retval.0 = phi i32 [ 4, %sw.bb4 ], [ 3, %sw.bb3 ], [ 2, %sw.bb2 ], [ 1, %sw.bb1 ], [ 0, %sw.bb0 ] 59 ret i32 %retval.0 60} 61 62; We should not forward `%m` to 1, as this does not simplify the CFG. 63define i32 @forward_one(i32 %m) { 64; NO_FWD-LABEL: @forward_one( 65; NO_FWD-NEXT: entry: 66; NO_FWD-NEXT: switch i32 [[M:%.*]], label [[SW_BB4:%.*]] [ 67; NO_FWD-NEXT: i32 0, label [[RETURN:%.*]] 68; NO_FWD-NEXT: i32 1, label [[SW_BB1:%.*]] 69; NO_FWD-NEXT: i32 2, label [[SW_BB2:%.*]] 70; NO_FWD-NEXT: i32 3, label [[SW_BB3:%.*]] 71; NO_FWD-NEXT: ] 72; NO_FWD: sw.bb1: 73; NO_FWD-NEXT: br label [[RETURN]] 74; NO_FWD: sw.bb2: 75; NO_FWD-NEXT: br label [[RETURN]] 76; NO_FWD: sw.bb3: 77; NO_FWD-NEXT: br label [[RETURN]] 78; NO_FWD: sw.bb4: 79; NO_FWD-NEXT: br label [[RETURN]] 80; NO_FWD: return: 81; NO_FWD-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 4, [[SW_BB4]] ], [ 5, [[SW_BB3]] ], [ 6, [[SW_BB2]] ], [ 1, [[SW_BB1]] ], [ 8, [[ENTRY:%.*]] ] 82; NO_FWD-NEXT: ret i32 [[RETVAL_0]] 83; 84; FWD-LABEL: @forward_one( 85; FWD-NEXT: entry: 86; FWD-NEXT: switch i32 [[M:%.*]], label [[SW_BB4:%.*]] [ 87; FWD-NEXT: i32 0, label [[RETURN:%.*]] 88; FWD-NEXT: i32 1, label [[SW_BB1:%.*]] 89; FWD-NEXT: i32 2, label [[SW_BB2:%.*]] 90; FWD-NEXT: i32 3, label [[SW_BB3:%.*]] 91; FWD-NEXT: ] 92; FWD: sw.bb1: 93; FWD-NEXT: br label [[RETURN]] 94; FWD: sw.bb2: 95; FWD-NEXT: br label [[RETURN]] 96; FWD: sw.bb3: 97; FWD-NEXT: br label [[RETURN]] 98; FWD: sw.bb4: 99; FWD-NEXT: br label [[RETURN]] 100; FWD: return: 101; FWD-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 4, [[SW_BB4]] ], [ 5, [[SW_BB3]] ], [ 6, [[SW_BB2]] ], [ 1, [[SW_BB1]] ], [ 8, [[ENTRY:%.*]] ] 102; FWD-NEXT: ret i32 [[RETVAL_0]] 103; 104entry: 105 switch i32 %m, label %sw.bb4 [ 106 i32 0, label %sw.bb0 107 i32 1, label %sw.bb1 108 i32 2, label %sw.bb2 109 i32 3, label %sw.bb3 110 ] 111 112sw.bb0: ; preds = %entry 113 br label %return 114 115sw.bb1: ; preds = %entry 116 br label %return 117 118sw.bb2: ; preds = %entry 119 br label %return 120 121sw.bb3: ; preds = %entry 122 br label %return 123 124sw.bb4: ; preds = %entry 125 br label %return 126 127return: ; preds = %entry, %sw.bb4, %sw.bb3, %sw.bb2, %sw.bb1 128 %retval.0 = phi i32 [ 4, %sw.bb4 ], [ 5, %sw.bb3 ], [ 6, %sw.bb2 ], [ 1, %sw.bb1 ], [ 8, %sw.bb0 ] 129 ret i32 %retval.0 130} 131 132; If 1 incoming phi value is a case constant of a switch, convert it to the switch condition: 133; https://bugs.llvm.org/show_bug.cgi?id=34471 134; This then subsequently should allow squashing of the other trivial case blocks. 135 136define i32 @PR34471(i32 %x) { 137; NO_FWD-LABEL: @PR34471( 138; NO_FWD-NEXT: entry: 139; NO_FWD-NEXT: switch i32 [[X:%.*]], label [[ELSE3:%.*]] [ 140; NO_FWD-NEXT: i32 17, label [[RETURN:%.*]] 141; NO_FWD-NEXT: i32 19, label [[IF19:%.*]] 142; NO_FWD-NEXT: i32 42, label [[IF19]] 143; NO_FWD-NEXT: ] 144; NO_FWD: if19: 145; NO_FWD-NEXT: br label [[RETURN]] 146; NO_FWD: else3: 147; NO_FWD-NEXT: br label [[RETURN]] 148; NO_FWD: return: 149; NO_FWD-NEXT: [[R:%.*]] = phi i32 [ [[X]], [[IF19]] ], [ 0, [[ELSE3]] ], [ 17, [[ENTRY:%.*]] ] 150; NO_FWD-NEXT: ret i32 [[R]] 151; 152; FWD-LABEL: @PR34471( 153; FWD-NEXT: entry: 154; FWD-NEXT: switch i32 [[X:%.*]], label [[ELSE3:%.*]] [ 155; FWD-NEXT: i32 17, label [[RETURN:%.*]] 156; FWD-NEXT: i32 19, label [[RETURN]] 157; FWD-NEXT: i32 42, label [[RETURN]] 158; FWD-NEXT: ] 159; FWD: else3: 160; FWD-NEXT: br label [[RETURN]] 161; FWD: return: 162; FWD-NEXT: [[R:%.*]] = phi i32 [ 0, [[ELSE3]] ], [ [[X]], [[ENTRY:%.*]] ], [ [[X]], [[ENTRY]] ], [ [[X]], [[ENTRY]] ] 163; FWD-NEXT: ret i32 [[R]] 164; 165entry: 166 switch i32 %x, label %else3 [ 167 i32 17, label %return 168 i32 19, label %if19 169 i32 42, label %if42 170 ] 171 172if19: 173 br label %return 174 175if42: 176 br label %return 177 178else3: 179 br label %return 180 181return: 182 %r = phi i32 [ %x, %if19 ], [ %x, %if42 ], [ 0, %else3 ], [ 17, %entry ] 183 ret i32 %r 184} 185 186; We can replace `[ 1, %bb2 ]` with `[ %arg1, %bb2 ]`. 187define { i64, i64 } @PR95919(i64 noundef %arg, i64 noundef %arg1) { 188; NO_FWD-LABEL: @PR95919( 189; NO_FWD-NEXT: bb: 190; NO_FWD-NEXT: switch i64 [[ARG1:%.*]], label [[BB3:%.*]] [ 191; NO_FWD-NEXT: i64 0, label [[BB5:%.*]] 192; NO_FWD-NEXT: i64 1, label [[BB2:%.*]] 193; NO_FWD-NEXT: ] 194; NO_FWD: bb2: 195; NO_FWD-NEXT: br label [[BB5]] 196; NO_FWD: bb3: 197; NO_FWD-NEXT: [[I:%.*]] = udiv i64 [[ARG:%.*]], [[ARG1]] 198; NO_FWD-NEXT: [[I4:%.*]] = shl nuw i64 [[I]], 1 199; NO_FWD-NEXT: br label [[BB5]] 200; NO_FWD: bb5: 201; NO_FWD-NEXT: [[I6:%.*]] = phi i64 [ [[I4]], [[BB3]] ], [ [[ARG]], [[BB2]] ], [ undef, [[BB:%.*]] ] 202; NO_FWD-NEXT: [[I7:%.*]] = phi i64 [ 1, [[BB3]] ], [ 1, [[BB2]] ], [ [[ARG1]], [[BB]] ] 203; NO_FWD-NEXT: [[I8:%.*]] = insertvalue { i64, i64 } poison, i64 [[I7]], 0 204; NO_FWD-NEXT: [[I9:%.*]] = insertvalue { i64, i64 } [[I8]], i64 [[I6]], 1 205; NO_FWD-NEXT: ret { i64, i64 } [[I9]] 206; 207; FWD-LABEL: @PR95919( 208; FWD-NEXT: bb: 209; FWD-NEXT: [[SWITCH:%.*]] = icmp ult i64 [[ARG1:%.*]], 2 210; FWD-NEXT: br i1 [[SWITCH]], label [[BB5:%.*]], label [[BB3:%.*]] 211; FWD: bb3: 212; FWD-NEXT: [[I:%.*]] = udiv i64 [[ARG:%.*]], [[ARG1]] 213; FWD-NEXT: [[I4:%.*]] = shl nuw i64 [[I]], 1 214; FWD-NEXT: br label [[BB5]] 215; FWD: bb5: 216; FWD-NEXT: [[I6:%.*]] = phi i64 [ [[I4]], [[BB3]] ], [ [[ARG]], [[BB:%.*]] ] 217; FWD-NEXT: [[I7:%.*]] = phi i64 [ 1, [[BB3]] ], [ [[ARG1]], [[BB]] ] 218; FWD-NEXT: [[I8:%.*]] = insertvalue { i64, i64 } poison, i64 [[I7]], 0 219; FWD-NEXT: [[I9:%.*]] = insertvalue { i64, i64 } [[I8]], i64 [[I6]], 1 220; FWD-NEXT: ret { i64, i64 } [[I9]] 221; 222bb: 223 switch i64 %arg1, label %bb3 [ 224 i64 0, label %bb5 225 i64 1, label %bb2 226 ] 227 228bb2: ; preds = %bb 229 br label %bb5 230 231bb3: ; preds = %bb 232 %i = udiv i64 %arg, %arg1 233 %i4 = shl nuw i64 %i, 1 234 br label %bb5 235 236bb5: ; preds = %bb3, %bb2, %bb 237 %i6 = phi i64 [ %i4, %bb3 ], [ %arg, %bb2 ], [ undef, %bb ] 238 %i7 = phi i64 [ 1, %bb3 ], [ 1, %bb2 ], [ %arg1, %bb ] 239 %i8 = insertvalue { i64, i64 } poison, i64 %i7, 0 240 %i9 = insertvalue { i64, i64 } %i8, i64 %i6, 1 241 ret { i64, i64 } %i9 242} 243