xref: /llvm-project/llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-update-memoryssa.ll (revision 2f79f5438cd6f4fa0fdc32458911c2d163f917c0)
1; RUN: opt -passes='loop-mssa(simple-loop-unswitch<nontrivial>),verify<loops>' -verify-dom-info -verify-memoryssa -S %s | FileCheck %s
2; RUN: opt -passes='loop-mssa(simple-loop-unswitch<nontrivial>),verify<loops>' -memssa-check-limit=3 -verify-dom-info -verify-memoryssa -S %s | FileCheck %s
3
4declare void @clobber()
5
6; Check that MemorySSA updating can deal with a clobbering access of a
7; duplicated load being a MemoryPHI outside the loop.
8define void @partial_unswitch_memssa_update(ptr noalias %ptr, i1 %c) {
9; CHECK-LABEL: @partial_unswitch_memssa_update(
10; CHECK-LABEL: loop.ph:
11; CHECK-NEXT:    [[LV:%[a-z0-9]+]] = load i32, ptr %ptr, align 4
12; CHECK-NEXT:    [[C:%[a-z0-9]+]] = icmp eq i32 [[LV]], 0
13; CHECK-NEXT:    br i1 [[C]]
14entry:
15  br i1 %c, label %loop.ph, label %outside.clobber
16
17outside.clobber:
18  call void @clobber()
19  br label %loop.ph
20
21loop.ph:
22  br label %loop.header
23
24loop.header:
25  %lv = load i32, ptr %ptr, align 4
26  %hc = icmp eq i32 %lv, 0
27  br i1 %hc, label %if, label %then
28
29if:
30  br label %loop.latch
31
32then:
33  br label %loop.latch
34
35loop.latch:
36  br i1 true, label %loop.header, label %exit
37
38exit:
39  ret void
40}
41
42; Check that MemorySSA updating can deal with skipping defining accesses in the
43; loop body until it finds the first defining access outside the loop.
44define void @partial_unswitch_inloop_stores_beteween_outside_defining_access(ptr noalias %ptr, ptr noalias %src) {
45; CHECK-LABEL: @partial_unswitch_inloop_stores_beteween_outside_defining_access
46; CHECK-LABEL: entry:
47; CHECK-NEXT:    store i64 0, ptr %ptr, align 1
48; CHECK-NEXT:    store i64 1, ptr %ptr, align 1
49; CHECK-NEXT:    [[LV:%[a-z0-9]+]] = load i16, ptr %src, align 1
50; CHECK-NEXT:    [[C:%[a-z0-9]+]] = icmp eq i16 [[LV]], 0
51; CHECK-NEXT:    br i1 [[C]]
52;
53entry:
54  store i64 0, ptr %ptr, align 1
55  store i64 1, ptr %ptr, align 1
56  br label %loop
57
58loop:
59  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
60  store i64 2, ptr %ptr, align 1
61  %lv = load i16, ptr %src, align 1
62  %invar.cond = icmp eq i16 %lv, 0
63  br i1 %invar.cond, label %noclobber, label %loop.latch
64
65noclobber:
66  br label %loop.latch
67
68loop.latch:
69  %iv.next = add i32 %iv, 1
70  %ec = icmp eq i32 %iv, 1000
71  br i1 %ec, label %exit, label %loop
72
73exit:
74  ret void
75}
76
77