1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 2; RUN: opt -mtriple=amdgcn-- -passes='default<O3>' -S %s | FileCheck %s 3 4; Check that loop unswitch happened and condition hoisted out of the loop. 5; Condition is uniform so even targets with divergence should perform unswitching. 6 7; This fails with the new pass manager: 8; https://bugs.llvm.org/show_bug.cgi?id=48819 9; The correct behaviour (allow uniform non-trivial branches to be 10; unswitched on all targets) requires access to the function-level 11; divergence analysis from a loop transform, which is currently not 12; supported in the new pass manager. 13 14; SHOULDBE-LABEL: {{^}}define amdgpu_kernel void @uniform_unswitch 15; SHOULDBE: entry: 16; SHOULDBE-NEXT: [[LOOP_COND:%[a-z0-9]+]] = icmp 17; SHOULDBE-NEXT: [[IF_COND:%[a-z0-9]+]] = icmp eq i32 %x, 123456 18; SHOULDBE-NEXT: and i1 [[LOOP_COND]], [[IF_COND]] 19; SHOULDBE-NEXT: br i1 20 21define amdgpu_kernel void @uniform_unswitch(ptr nocapture %out, i32 %n, i32 %x) { 22; CHECK-LABEL: define amdgpu_kernel void @uniform_unswitch( 23; CHECK-SAME: ptr writeonly captures(none) [[OUT:%.*]], i32 [[N:%.*]], i32 [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { 24; CHECK-NEXT: entry: 25; CHECK-NEXT: [[OUT_GLOBAL:%.*]] = addrspacecast ptr [[OUT]] to ptr addrspace(1) 26; CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N]], 0 27; CHECK-NEXT: br i1 [[CMP6]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_COND_CLEANUP:%.*]] 28; CHECK: for.body.lr.ph: 29; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[X]], 123456 30; CHECK-NEXT: br label [[FOR_BODY:%.*]] 31; CHECK: for.cond.cleanup: 32; CHECK-NEXT: ret void 33; CHECK: for.body: 34; CHECK-NEXT: [[I_07:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[FOR_INC:%.*]] ] 35; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[FOR_INC]] 36; CHECK: if.then: 37; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[I_07]] to i64 38; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(1) [[OUT_GLOBAL]], i64 [[TMP0]] 39; CHECK-NEXT: store i32 [[I_07]], ptr addrspace(1) [[ARRAYIDX]], align 4 40; CHECK-NEXT: br label [[FOR_INC]] 41; CHECK: for.inc: 42; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_07]], 1 43; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[N]] 44; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]] 45; 46entry: 47 %cmp6 = icmp sgt i32 %n, 0 48 br i1 %cmp6, label %for.body.lr.ph, label %for.cond.cleanup 49 50for.body.lr.ph: ; preds = %entry 51 %cmp1 = icmp eq i32 %x, 123456 52 br label %for.body 53 54for.cond.cleanup.loopexit: ; preds = %for.inc 55 br label %for.cond.cleanup 56 57for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry 58 ret void 59 60for.body: ; preds = %for.inc, %for.body.lr.ph 61 %i.07 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ] 62 br i1 %cmp1, label %if.then, label %for.inc 63 64if.then: ; preds = %for.body 65 %arrayidx = getelementptr inbounds i32, ptr %out, i32 %i.07 66 store i32 %i.07, ptr %arrayidx, align 4 67 br label %for.inc 68 69for.inc: ; preds = %for.body, %if.then 70 %inc = add nuw nsw i32 %i.07, 1 71 %exitcond = icmp eq i32 %inc, %n 72 br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body 73} 74 75declare i32 @llvm.amdgcn.workitem.id.x() #0 76 77attributes #0 = { nounwind readnone } 78