1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes='sroa<preserve-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-PRESERVE-CFG 3; RUN: opt < %s -passes='sroa<modify-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-MODIFY-CFG 4target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-f80:128-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64" 5 6declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture, i32, i1) nounwind 7declare void @llvm.memset.p0.i32(ptr nocapture, i8, i32, i1) nounwind 8declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind 9 10; This tests that allocas are not split into slices that are not byte width multiple 11define void @no_split_on_non_byte_width(i32) { 12; CHECK-LABEL: @no_split_on_non_byte_width( 13; CHECK-NEXT: [[ARG_SROA_0:%.*]] = alloca i8, align 8 14; CHECK-NEXT: [[ARG_SROA_0_0_EXTRACT_TRUNC:%.*]] = trunc i32 [[TMP0:%.*]] to i8 15; CHECK-NEXT: store i8 [[ARG_SROA_0_0_EXTRACT_TRUNC]], ptr [[ARG_SROA_0]], align 8 16; CHECK-NEXT: [[ARG_SROA_3_0_EXTRACT_SHIFT:%.*]] = lshr i32 [[TMP0]], 8 17; CHECK-NEXT: [[ARG_SROA_3_0_EXTRACT_TRUNC:%.*]] = trunc i32 [[ARG_SROA_3_0_EXTRACT_SHIFT]] to i24 18; CHECK-NEXT: br label [[LOAD_I32:%.*]] 19; CHECK: load_i32: 20; CHECK-NEXT: [[ARG_SROA_0_0_ARG_SROA_0_0_R01:%.*]] = load i8, ptr [[ARG_SROA_0]], align 8 21; CHECK-NEXT: br label [[LOAD_I1:%.*]] 22; CHECK: load_i1: 23; CHECK-NEXT: [[ARG_SROA_0_0_ARG_SROA_0_0_T1:%.*]] = load i1, ptr [[ARG_SROA_0]], align 8 24; CHECK-NEXT: ret void 25; 26 %arg = alloca i32 , align 8 27 store i32 %0, ptr %arg 28 br label %load_i32 29 30load_i32: 31 %r0 = load i32, ptr %arg 32 br label %load_i1 33 34load_i1: 35 %t1 = load i1, ptr %arg 36 ret void 37} 38 39; PR18726: Check that we use memcpy and memset to fill out padding when we have 40; a slice with a simple single type whose store size is smaller than the slice 41; size. 42 43%union.Foo = type { x86_fp80, i64, i64 } 44 45@foo_copy_source = external constant %union.Foo 46@i64_sink = global i64 0 47 48define void @memcpy_fp80_padding() { 49; CHECK-LABEL: @memcpy_fp80_padding( 50; CHECK-NEXT: [[X_SROA_0:%.*]] = alloca x86_fp80, align 16 51; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 16 [[X_SROA_0]], ptr align 16 @foo_copy_source, i32 16, i1 false) 52; CHECK-NEXT: [[X_SROA_1_0_COPYLOAD:%.*]] = load i64, ptr getelementptr inbounds (i8, ptr @foo_copy_source, i64 16), align 16 53; CHECK-NEXT: [[X_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr getelementptr inbounds (i8, ptr @foo_copy_source, i64 24), align 8 54; CHECK-NEXT: store i64 [[X_SROA_1_0_COPYLOAD]], ptr @i64_sink, align 4 55; CHECK-NEXT: ret void 56; 57 %x = alloca %union.Foo 58 59 ; Copy from a global. 60 call void @llvm.memcpy.p0.p0.i32(ptr align 16 %x, ptr align 16 @foo_copy_source, i32 32, i1 false) 61 62 ; Access a slice of the alloca to trigger SROA. 63 %mid_p = getelementptr %union.Foo, ptr %x, i32 0, i32 1 64 %elt = load i64, ptr %mid_p 65 store i64 %elt, ptr @i64_sink 66 ret void 67} 68 69define void @memset_fp80_padding() { 70; CHECK-LABEL: @memset_fp80_padding( 71; CHECK-NEXT: [[X_SROA_0:%.*]] = alloca x86_fp80, align 16 72; CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 16 [[X_SROA_0]], i8 -1, i32 16, i1 false) 73; CHECK-NEXT: store i64 -1, ptr @i64_sink, align 4 74; CHECK-NEXT: ret void 75; 76 %x = alloca %union.Foo 77 78 ; Set to all ones. 79 call void @llvm.memset.p0.i32(ptr align 16 %x, i8 -1, i32 32, i1 false) 80 81 ; Access a slice of the alloca to trigger SROA. 82 %mid_p = getelementptr %union.Foo, ptr %x, i32 0, i32 1 83 %elt = load i64, ptr %mid_p 84 store i64 %elt, ptr @i64_sink 85 ret void 86} 87 88%S.vec3float = type { float, float, float } 89%U.vec3float = type { <4 x float> } 90 91declare i32 @memcpy_vec3float_helper(ptr) 92 93; PR18726: Check that SROA does not rewrite a 12-byte memcpy into a 16-byte 94; vector store, hence accidentally putting gibberish onto the stack. 95define i32 @memcpy_vec3float_widening(ptr %x) { 96; CHECK-LABEL: @memcpy_vec3float_widening( 97; CHECK-NEXT: entry: 98; CHECK-NEXT: [[TMP1_SROA_0_0_COPYLOAD:%.*]] = load <3 x float>, ptr [[X:%.*]], align 4 99; CHECK-NEXT: [[TMP1_SROA_0_0_VEC_EXPAND:%.*]] = shufflevector <3 x float> [[TMP1_SROA_0_0_COPYLOAD]], <3 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 poison> 100; CHECK-NEXT: [[TMP1_SROA_0_0_VECBLEND:%.*]] = select <4 x i1> <i1 true, i1 true, i1 true, i1 false>, <4 x float> [[TMP1_SROA_0_0_VEC_EXPAND]], <4 x float> undef 101; CHECK-NEXT: [[TMP2:%.*]] = alloca [[S_VEC3FLOAT:%.*]], align 4 102; CHECK-NEXT: [[TMP1_SROA_0_0_VEC_EXTRACT:%.*]] = shufflevector <4 x float> [[TMP1_SROA_0_0_VECBLEND]], <4 x float> poison, <3 x i32> <i32 0, i32 1, i32 2> 103; CHECK-NEXT: store <3 x float> [[TMP1_SROA_0_0_VEC_EXTRACT]], ptr [[TMP2]], align 4 104; CHECK-NEXT: [[RESULT:%.*]] = call i32 @memcpy_vec3float_helper(ptr [[TMP2]]) 105; CHECK-NEXT: ret i32 [[RESULT]] 106; 107entry: 108 ; Create a temporary variable %tmp1 and copy %x[0] into it 109 %tmp1 = alloca %S.vec3float, align 4 110 call void @llvm.memcpy.p0.p0.i32(ptr align 4 %tmp1, ptr align 4 %x, i32 12, i1 false) 111 112 ; The following block does nothing; but appears to confuse SROA 113 %unused3 = load <4 x float>, ptr %tmp1, align 1 114 115 ; Create a second temporary and copy %tmp1 into it 116 %tmp2 = alloca %S.vec3float, align 4 117 call void @llvm.memcpy.p0.p0.i32(ptr align 4 %tmp2, ptr align 4 %tmp1, i32 12, i1 false) 118 119 %result = call i32 @memcpy_vec3float_helper(ptr %tmp2) 120 ret i32 %result 121} 122 123; Don't crash on length that is constant expression. 124 125define void @PR50888() { 126; CHECK-LABEL: @PR50888( 127; CHECK-NEXT: [[ARRAY:%.*]] = alloca i8, align 1 128; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ARRAY]], i8 0, i64 ptrtoint (ptr @PR50888 to i64), i1 false) 129; CHECK-NEXT: ret void 130; 131 %array = alloca i8 132 call void @llvm.memset.p0.i64(ptr align 16 %array, i8 0, i64 ptrtoint (ptr @PR50888 to i64), i1 false) 133 ret void 134} 135 136; Don't crash on out-of-bounds length. 137 138define void @PR50910() { 139; CHECK-LABEL: @PR50910( 140; CHECK-NEXT: [[T1:%.*]] = alloca i8, i64 1, align 8 141; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[T1]], i8 0, i64 1, i1 false) 142; CHECK-NEXT: ret void 143; 144 %t1 = alloca i8, i64 1, align 8 145 call void @llvm.memset.p0.i64(ptr align 8 %t1, i8 0, i64 4294967296, i1 false) 146 ret void 147} 148 149define i1 @presplit_overlarge_load() { 150; CHECK-LABEL: @presplit_overlarge_load( 151; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i8, align 2 152; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_0_L11:%.*]] = load i8, ptr [[A_SROA_0]], align 2 153; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_0_L2:%.*]] = load i1, ptr [[A_SROA_0]], align 2 154; CHECK-NEXT: ret i1 [[A_SROA_0_0_A_SROA_0_0_L2]] 155; 156 %A = alloca i16 157 %L1 = load i32, ptr %A 158 %L2 = load i1, ptr %A 159 ret i1 %L2 160} 161;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 162; CHECK-MODIFY-CFG: {{.*}} 163; CHECK-PRESERVE-CFG: {{.*}} 164