1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -passes='sroa<preserve-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-PRESERVE-CFG 3; RUN: opt < %s -passes='sroa<modify-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-MODIFY-CFG 4target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64" 5 6declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture, i32, i1) nounwind 7 8; Check that the chosen type for a split is independent from the order of 9; slices even in case of types that are skipped because their width is not a 10; byte width multiple 11define void @skipped_inttype_first(ptr) { 12; CHECK-LABEL: @skipped_inttype_first( 13; CHECK-NEXT: [[ARG_SROA_0:%.*]] = alloca ptr, align 8 14; CHECK-NEXT: [[ARG_SROA_0_0_COPYLOAD:%.*]] = load ptr, ptr [[TMP0:%.*]], align 8 15; CHECK-NEXT: store ptr [[ARG_SROA_0_0_COPYLOAD]], ptr [[ARG_SROA_0]], align 8 16; CHECK-NEXT: [[ARG_SROA_3_0__SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 8 17; CHECK-NEXT: [[ARG_SROA_3_0_COPYLOAD:%.*]] = load i64, ptr [[ARG_SROA_3_0__SROA_IDX]], align 8 18; CHECK-NEXT: [[ARG_SROA_0_0_ARG_SROA_0_0_B0:%.*]] = load i63, ptr [[ARG_SROA_0]], align 8 19; CHECK-NEXT: [[ARG_SROA_0_0_ARG_SROA_0_0_B1:%.*]] = load ptr, ptr [[ARG_SROA_0]], align 8 20; CHECK-NEXT: ret void 21; 22 %arg = alloca { ptr, i32 }, align 8 23 call void @llvm.memcpy.p0.p0.i32(ptr align 8 %arg, ptr align 8 %0, i32 16, i1 false) 24 %b = getelementptr inbounds { ptr, i32 }, ptr %arg, i64 0, i32 0 25 %b0 = load i63, ptr %b 26 %b1 = load ptr, ptr %b 27 ret void 28} 29 30define void @skipped_inttype_last(ptr) { 31; CHECK-LABEL: @skipped_inttype_last( 32; CHECK-NEXT: [[ARG_SROA_0:%.*]] = alloca ptr, align 8 33; CHECK-NEXT: [[ARG_SROA_0_0_COPYLOAD:%.*]] = load ptr, ptr [[TMP0:%.*]], align 8 34; CHECK-NEXT: store ptr [[ARG_SROA_0_0_COPYLOAD]], ptr [[ARG_SROA_0]], align 8 35; CHECK-NEXT: [[ARG_SROA_3_0__SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 8 36; CHECK-NEXT: [[ARG_SROA_3_0_COPYLOAD:%.*]] = load i64, ptr [[ARG_SROA_3_0__SROA_IDX]], align 8 37; CHECK-NEXT: [[ARG_SROA_0_0_ARG_SROA_0_0_B1:%.*]] = load ptr, ptr [[ARG_SROA_0]], align 8 38; CHECK-NEXT: [[ARG_SROA_0_0_ARG_SROA_0_0_B0:%.*]] = load i63, ptr [[ARG_SROA_0]], align 8 39; CHECK-NEXT: ret void 40; 41 %arg = alloca { ptr, i32 }, align 8 42 call void @llvm.memcpy.p0.p0.i32(ptr align 8 %arg, ptr align 8 %0, i32 16, i1 false) 43 %b = getelementptr inbounds { ptr, i32 }, ptr %arg, i64 0, i32 0 44 %b1 = load ptr, ptr %b 45 %b0 = load i63, ptr %b 46 ret void 47} 48;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 49; CHECK-MODIFY-CFG: {{.*}} 50; CHECK-PRESERVE-CFG: {{.*}} 51