1c8eb535aSeopXD; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2c8eb535aSeopXD; RUN: opt < %s -passes='sroa<preserve-cfg>' -S | FileCheck %s --check-prefixes=CHECK 3c8eb535aSeopXD; RUN: opt < %s -passes='sroa<modify-cfg>' -S | FileCheck %s --check-prefixes=CHECK 4c8eb535aSeopXD 5c8eb535aSeopXD; This test checks that SROA runs mem2reg on structure that contains 6c8eb535aSeopXD; homogeneous scalable vectors. 7c8eb535aSeopXD 8c8eb535aSeopXD%struct.test = type { <vscale x 1 x i32>, <vscale x 1 x i32> } 9c8eb535aSeopXD 10c8eb535aSeopXDdefine %struct.test @alloca(<vscale x 1 x i32> %x, <vscale x 1 x i32> %y) { 11c8eb535aSeopXD; CHECK-LABEL: @alloca( 12c8eb535aSeopXD; CHECK-NEXT: [[AGG0:%.*]] = insertvalue [[STRUCT_TEST:%.*]] undef, <vscale x 1 x i32> [[X:%.*]], 0 13c8eb535aSeopXD; CHECK-NEXT: [[AGG1:%.*]] = insertvalue [[STRUCT_TEST]] [[AGG0]], <vscale x 1 x i32> [[Y:%.*]], 1 14c8eb535aSeopXD; CHECK-NEXT: ret [[STRUCT_TEST]] [[AGG1]] 15c8eb535aSeopXD; 16c8eb535aSeopXD %addr = alloca %struct.test, align 4 17c8eb535aSeopXD %agg0 = insertvalue %struct.test undef, <vscale x 1 x i32> %x, 0 18c8eb535aSeopXD %agg1 = insertvalue %struct.test %agg0, <vscale x 1 x i32> %y, 1 19*2d69827cSNikita Popov store %struct.test %agg1, ptr %addr, align 4 20*2d69827cSNikita Popov %val = load %struct.test, ptr %addr, align 4 21c8eb535aSeopXD ret %struct.test %val 22c8eb535aSeopXD} 2339a41c89SeopXD 2439a41c89SeopXD 2539a41c89SeopXDdefine { <vscale x 2 x i32>, <vscale x 2 x i32> } @return_tuple(<vscale x 2 x i32> %v_tuple.coerce0, <vscale x 2 x i32> %v_tuple.coerce1) { 2639a41c89SeopXD; CHECK-LABEL: @return_tuple( 2739a41c89SeopXD; CHECK-NEXT: entry: 2839a41c89SeopXD; CHECK-NEXT: [[TMP0:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[V_TUPLE_COERCE0:%.*]], 0 2939a41c89SeopXD; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } [[TMP0]], <vscale x 2 x i32> [[V_TUPLE_COERCE1:%.*]], 1 3039a41c89SeopXD; CHECK-NEXT: [[COERCE_EXTRACT0:%.*]] = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } [[TMP1]], 0 3139a41c89SeopXD; CHECK-NEXT: [[COERCE_EXTRACT1:%.*]] = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } [[TMP1]], 1 3239a41c89SeopXD; CHECK-NEXT: [[CALL:%.*]] = call { <vscale x 2 x i32>, <vscale x 2 x i32> } @foo(<vscale x 2 x i32> [[COERCE_EXTRACT0]], <vscale x 2 x i32> [[COERCE_EXTRACT1]]) 3339a41c89SeopXD; CHECK-NEXT: ret { <vscale x 2 x i32>, <vscale x 2 x i32> } [[CALL]] 3439a41c89SeopXD; 3539a41c89SeopXDentry: 3639a41c89SeopXD %v_tuple = alloca { <vscale x 2 x i32>, <vscale x 2 x i32> }, align 4 3739a41c89SeopXD %v_tuple.addr = alloca { <vscale x 2 x i32>, <vscale x 2 x i32> }, align 4 3839a41c89SeopXD %coerce = alloca { <vscale x 2 x i32>, <vscale x 2 x i32> }, align 4 3939a41c89SeopXD %0 = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> %v_tuple.coerce0, 0 4039a41c89SeopXD %1 = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } %0, <vscale x 2 x i32> %v_tuple.coerce1, 1 4139a41c89SeopXD store { <vscale x 2 x i32>, <vscale x 2 x i32> } %1, ptr %v_tuple, align 4 4239a41c89SeopXD %v_tuple1 = load { <vscale x 2 x i32>, <vscale x 2 x i32> }, ptr %v_tuple, align 4 4339a41c89SeopXD store { <vscale x 2 x i32>, <vscale x 2 x i32> } %v_tuple1, ptr %v_tuple.addr, align 4 4439a41c89SeopXD %2 = load { <vscale x 2 x i32>, <vscale x 2 x i32> }, ptr %v_tuple.addr, align 4 4539a41c89SeopXD store { <vscale x 2 x i32>, <vscale x 2 x i32> } %2, ptr %coerce, align 4 4639a41c89SeopXD %coerce.tuple = load { <vscale x 2 x i32>, <vscale x 2 x i32> }, ptr %coerce, align 4 4739a41c89SeopXD %coerce.extract0 = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } %coerce.tuple, 0 4839a41c89SeopXD %coerce.extract1 = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } %coerce.tuple, 1 4939a41c89SeopXD %call = call { <vscale x 2 x i32>, <vscale x 2 x i32> } @foo(<vscale x 2 x i32> %coerce.extract0, <vscale x 2 x i32> %coerce.extract1) 5039a41c89SeopXD ret { <vscale x 2 x i32>, <vscale x 2 x i32> } %call 5139a41c89SeopXD} 5239a41c89SeopXD 5339a41c89SeopXDdeclare { <vscale x 2 x i32>, <vscale x 2 x i32> } @foo(<vscale x 2 x i32>, <vscale x 2 x i32>) 54