xref: /llvm-project/llvm/test/Transforms/SROA/scalable-vector-struct.ll (revision 2d69827c5c754f0eca98e497ecf0e52ed54b4fd3) 
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes='sroa<preserve-cfg>' -S | FileCheck %s --check-prefixes=CHECK
3; RUN: opt < %s -passes='sroa<modify-cfg>' -S | FileCheck %s --check-prefixes=CHECK
4
5; This test checks that SROA runs mem2reg on structure that contains
6; homogeneous scalable vectors.
7
8%struct.test = type { <vscale x 1 x i32>, <vscale x 1 x i32> }
9
10define %struct.test @alloca(<vscale x 1 x i32> %x, <vscale x 1 x i32> %y) {
11; CHECK-LABEL: @alloca(
12; CHECK-NEXT:    [[AGG0:%.*]] = insertvalue [[STRUCT_TEST:%.*]] undef, <vscale x 1 x i32> [[X:%.*]], 0
13; CHECK-NEXT:    [[AGG1:%.*]] = insertvalue [[STRUCT_TEST]] [[AGG0]], <vscale x 1 x i32> [[Y:%.*]], 1
14; CHECK-NEXT:    ret [[STRUCT_TEST]] [[AGG1]]
15;
16  %addr = alloca %struct.test, align 4
17  %agg0 = insertvalue %struct.test undef, <vscale x 1 x i32> %x, 0
18  %agg1 = insertvalue %struct.test %agg0, <vscale x 1 x i32> %y, 1
19  store %struct.test %agg1, ptr %addr, align 4
20  %val = load %struct.test, ptr %addr, align 4
21  ret %struct.test %val
22}
23
24
25define { <vscale x 2 x i32>, <vscale x 2 x i32> } @return_tuple(<vscale x 2 x i32> %v_tuple.coerce0, <vscale x 2 x i32> %v_tuple.coerce1) {
26; CHECK-LABEL: @return_tuple(
27; CHECK-NEXT:  entry:
28; CHECK-NEXT:    [[TMP0:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[V_TUPLE_COERCE0:%.*]], 0
29; CHECK-NEXT:    [[TMP1:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } [[TMP0]], <vscale x 2 x i32> [[V_TUPLE_COERCE1:%.*]], 1
30; CHECK-NEXT:    [[COERCE_EXTRACT0:%.*]] = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } [[TMP1]], 0
31; CHECK-NEXT:    [[COERCE_EXTRACT1:%.*]] = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } [[TMP1]], 1
32; CHECK-NEXT:    [[CALL:%.*]] = call { <vscale x 2 x i32>, <vscale x 2 x i32> } @foo(<vscale x 2 x i32> [[COERCE_EXTRACT0]], <vscale x 2 x i32> [[COERCE_EXTRACT1]])
33; CHECK-NEXT:    ret { <vscale x 2 x i32>, <vscale x 2 x i32> } [[CALL]]
34;
35entry:
36  %v_tuple = alloca { <vscale x 2 x i32>, <vscale x 2 x i32> }, align 4
37  %v_tuple.addr = alloca { <vscale x 2 x i32>, <vscale x 2 x i32> }, align 4
38  %coerce = alloca { <vscale x 2 x i32>, <vscale x 2 x i32> }, align 4
39  %0 = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> %v_tuple.coerce0, 0
40  %1 = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } %0, <vscale x 2 x i32> %v_tuple.coerce1, 1
41  store { <vscale x 2 x i32>, <vscale x 2 x i32> } %1, ptr %v_tuple, align 4
42  %v_tuple1 = load { <vscale x 2 x i32>, <vscale x 2 x i32> }, ptr %v_tuple, align 4
43  store { <vscale x 2 x i32>, <vscale x 2 x i32> } %v_tuple1, ptr %v_tuple.addr, align 4
44  %2 = load { <vscale x 2 x i32>, <vscale x 2 x i32> }, ptr %v_tuple.addr, align 4
45  store { <vscale x 2 x i32>, <vscale x 2 x i32> } %2, ptr %coerce, align 4
46  %coerce.tuple = load { <vscale x 2 x i32>, <vscale x 2 x i32> }, ptr %coerce, align 4
47  %coerce.extract0 = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } %coerce.tuple, 0
48  %coerce.extract1 = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } %coerce.tuple, 1
49  %call = call { <vscale x 2 x i32>, <vscale x 2 x i32> } @foo(<vscale x 2 x i32> %coerce.extract0, <vscale x 2 x i32> %coerce.extract1)
50  ret { <vscale x 2 x i32>, <vscale x 2 x i32> } %call
51}
52
53declare { <vscale x 2 x i32>, <vscale x 2 x i32> } @foo(<vscale x 2 x i32>, <vscale x 2 x i32>)
54