xref: /llvm-project/llvm/test/Transforms/SROA/fca.ll (revision 4f7e5d22060e8a89237ffb93c3e7be6e92fee8fe)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -passes='sroa<preserve-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-PRESERVE-CFG
3; RUN: opt < %s -passes='sroa<modify-cfg>' -S | FileCheck %s --check-prefixes=CHECK,CHECK-MODIFY-CFG
4
5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64"
6
7define { i32, i32 } @test0(i32 %x, i32 %y, { i32, i32 } %v) {
8; CHECK-LABEL: @test0(
9; CHECK-NEXT:  entry:
10; CHECK-NEXT:    [[V_FCA_0_EXTRACT:%.*]] = extractvalue { i32, i32 } [[V:%.*]], 0
11; CHECK-NEXT:    [[V_FCA_1_EXTRACT:%.*]] = extractvalue { i32, i32 } [[V]], 1
12; CHECK-NEXT:    [[RESULT_FCA_0_INSERT:%.*]] = insertvalue { i32, i32 } poison, i32 [[X:%.*]], 0
13; CHECK-NEXT:    [[RESULT_FCA_1_INSERT:%.*]] = insertvalue { i32, i32 } [[RESULT_FCA_0_INSERT]], i32 [[Y:%.*]], 1
14; CHECK-NEXT:    ret { i32, i32 } [[RESULT_FCA_1_INSERT]]
15;
16entry:
17  %a = alloca { i32, i32 }
18
19  store { i32, i32 } %v, ptr %a
20
21  %gep1 = getelementptr inbounds { i32, i32 }, ptr %a, i32 0, i32 0
22  store i32 %x, ptr %gep1
23  %gep2 = getelementptr inbounds { i32, i32 }, ptr %a, i32 0, i32 1
24  store i32 %y, ptr %gep2
25
26  %result = load { i32, i32 }, ptr %a
27  ret { i32, i32 } %result
28}
29
30define { i32, i32 } @test1(i32 %x, i32 %y) {
31; FIXME: This may be too conservative. Duncan argues that we are allowed to
32; split the volatile load and store here but must produce volatile scalar loads
33; and stores from them.
34; CHECK-LABEL: @test1(
35; CHECK-NEXT:  entry:
36; CHECK-NEXT:    [[A:%.*]] = alloca { i32, i32 }, align 8
37; CHECK-NEXT:    [[B:%.*]] = alloca { i32, i32 }, align 8
38; CHECK-NEXT:    store i32 [[X:%.*]], ptr [[A]], align 8
39; CHECK-NEXT:    [[A_4_GEP2_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 4
40; CHECK-NEXT:    store i32 [[Y:%.*]], ptr [[A_4_GEP2_SROA_IDX]], align 4
41; CHECK-NEXT:    [[A_0_RESULT:%.*]] = load volatile { i32, i32 }, ptr [[A]], align 8
42; CHECK-NEXT:    store volatile { i32, i32 } [[A_0_RESULT]], ptr [[B]], align 8
43; CHECK-NEXT:    ret { i32, i32 } [[A_0_RESULT]]
44;
45entry:
46  %a = alloca { i32, i32 }
47  %b = alloca { i32, i32 }
48
49  %gep1 = getelementptr inbounds { i32, i32 }, ptr %a, i32 0, i32 0
50  store i32 %x, ptr %gep1
51  %gep2 = getelementptr inbounds { i32, i32 }, ptr %a, i32 0, i32 1
52  store i32 %y, ptr %gep2
53
54  %result = load volatile { i32, i32 }, ptr %a
55  store volatile { i32, i32 } %result, ptr %b
56  ret { i32, i32 } %result
57}
58;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
59; CHECK-MODIFY-CFG: {{.*}}
60; CHECK-PRESERVE-CFG: {{.*}}
61